/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/ |
mix-1.d | 21 [ ]+0:[ ]+cc000190[ ]+movi 0,r25 26 [ ]+c:[ ]+cc000190[ ]+movi 0,r25 33 [ ]+18:[ ]+cc000360[ ]+movi 0,r54 37 [ ]+20:[ ]+cc0002d0[ ]+movi 0,r45
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syntax-1.d | 58 ac: cc001000 movi 4,r0 118 140: cc000000 movi 0,r0 122 150: cc000000 movi 0,r0 126 160: cfff7000 movi -36,r0 127 164: cfffe400 movi -7,r0 135 174: cfffd000 movi -12,r0 136 178: cfffc000 movi -16,r0 149 188: cc002400 movi 9,r0 150 18c: cc001c00 movi 7,r0 151 190: cc004000 movi 16,r [all...] |
case-1.d | 12 [ ]+8:[ ]+cc000190[ ]+movi 0,r25 17 [ ]+14:[ ]+cc000190[ ]+movi 0,r25 22 [ ]+20:[ ]+cc00a820[ ]+movi 42,r2
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relax-1.d | 14 [ ]+4:[ ]+cc000990[ ]+movi 2,r25 25 [ ]+20014:[ ]+cffff590[ ]+movi -3,r25 28 [ ]+20020:[ ]+cffff590[ ]+movi -3,r25
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relax-2.d | 14 [ ]+4:[ ]+cc000990[ ]+movi 2,r25 25 [ ]+20014:[ ]+cffff590[ ]+movi -3,r25 28 [ ]+20020:[ ]+cffff590[ ]+movi -3,r25
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ptext64-1.d | 11 [ ]+0:[ ]+cc000190[ ]+movi 0,r25 20 [ ]+14:[ ]+cc000190[ ]+movi 0,r25 29 [ ]+28:[ ]+cc000190[ ]+movi 0,r25 38 [ ]+3c:[ ]+cc000190[ ]+movi 0,r25 47 [ ]+50:[ ]+cc000190[ ]+movi 0,r25 56 [ ]+64:[ ]+cc000190[ ]+movi 0,r25
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ptc32-1.d | 11 [ ]+0:[ ]+cc000190[ ]+movi 0,r25
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ptc64-32-1.d | 11 [ ]+0:[ ]+cc000190[ ]+movi 0,r25
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mix-noexp-1.d | 28 [ ]+8:[ ]+cc000360[ ]+movi 0,r54 30 [ ]+c:[ ]+cc0002d0[ ]+movi 0,r45
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/external/llvm/test/MC/AArch64/ |
neon-mov.s | 9 movi v0.2s, #1 10 movi v1.2s, #0 11 movi v15.2s, #1, lsl #8 12 movi v16.2s, #1, lsl #16 13 movi v31.2s, #1, lsl #24 14 movi v0.4s, #1 15 movi v0.4s, #1, lsl #8 16 movi v0.4s, #1, lsl #16 17 movi v0.4s, #1, lsl #24 18 movi v0.4h, # [all...] |
/external/gemmlowp/meta/ |
streams_arm_64.h | 39 "movi v8.8h, #0\n" 80 "movi v8.8h, #0\n" 99 "movi v0.8b, #0\n" 133 "movi v8.8h, #0\n" 152 "movi v0.8b, #0\n" 186 "movi v8.8h, #0\n" 205 "movi v0.8b, #0\n" 240 "movi v8.8h, #0\n" 259 "movi v0.8b, #0\n" 293 "movi v8.8h, #0\n [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-vector-imm.ll | 53 ; CHECK: movi.4s v0, #75 60 ; CHECK: movi.4s v0, #75, lsl #8 67 ; CHECK: movi.4s v0, #75, lsl #16 74 ; CHECK: movi.4s v0, #75, lsl #24 81 ; CHECK: movi.8h v0, #75 89 ; CHECK: movi.8h v0, #75, lsl #8 96 ; CHECK: movi.4s v0, #75, msl #8 103 ; CHECK: movi.4s v0, #75, msl #16 110 ; CHECK: movi.16b v0, #75 118 ; CHECK: movi.2d v0, #0xff00ff00ff00f [all...] |
aarch64-smax-constantfold.ll | 9 ; CHECK: movi d{{[0-9]+}}, #0000000000000000
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fast-isel-cmp-vec.ll | 14 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1 27 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff 29 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1 45 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1 59 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff 61 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1 77 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1 90 ; CHECK-NEXT: movi.2d [[CMP:v[0-9]+]], #0xffffffffffffffff 92 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
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aarch64-be-bv.ll | 8 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1 20 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #8 32 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #16 44 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #24 56 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1 68 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1, lsl #8 80 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #8 92 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #16 104 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].16b, #1 116 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].2d, #0x00ffff0000fff [all...] |
arm64-vector-ext.ll | 4 ;CHECK: movi.4h v1, #1 22 ; CHECK: movi d0, #0000000000000000
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bitcast.ll | 7 ; CHECK: movi d0, #0000000000000000 19 ; CHECK: movi d0, #0000000000000000
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bitreverse.ll | 51 ; CHECK-DAG: movi [[M1:v.*]], #128 52 ; CHECK-DAG: movi [[M2:v.*]], #64 53 ; CHECK-DAG: movi [[M3:v.*]], #32 54 ; CHECK-DAG: movi [[M4:v.*]], #16 55 ; CHECK-DAG: movi [[M5:v.*]], #8{{$}} 56 ; CHECK-DAG: movi [[M6:v.*]], #4{{$}} 57 ; CHECK-DAG: movi [[M7:v.*]], #2{{$}} 58 ; CHECK-DAG: movi [[M8:v.*]], #1{{$}}
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fp16-vector-nvcast.ll | 6 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2s, #171, lsl #16 17 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4h, #171 28 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8b, #171 39 ; CHECK-NEXT: movi d[[REG:[0-9]+]], #0000000000000000 49 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4s, #171, lsl #16 60 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8h, #171 71 ; CHECK-NEXT: movi v[[REG:[0-9]+]].16b, #171 82 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2d, #0000000000000000
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arm64-fcmp-opt.ll | 44 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 56 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 68 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 80 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 92 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 104 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 115 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 126 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 137 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0 148 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], # [all...] |
arm64-fcopysign.ll | 8 ; CHECK: movi.4s v2, #128, lsl #24 17 ; CHECK: movi.2d v2, #0 40 ; CHECK: movi.4s v[[CONST:[0-9]+]], #128, lsl #24
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-nds32/ |
imm.d | 13 0+1008 <[^>]*> movi \$r0, 70179
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/sh64/ |
crange3.dd | 17 101c: cc00bd40 movi 47,r20 30 1050: cc00bd50 movi 47,r21 31 1054: cc0084c0 movi 33,r12 50 10a0: cc0084d0 movi 33,r13
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/external/libhevc/common/arm64/ |
ihevc_intra_pred_luma_vert.s | 195 movi d18, #0x00000000000000ff 210 movi d3, #0x00000000000000ff 226 movi d1, #0x00000000000000ff 229 movi d6, #0x00000000000000ff 250 movi d18, #0x00000000000000ff 253 movi d3, #0x00000000000000ff 260 movi d1, #0x00000000000000ff 262 movi d6, #0x00000000000000ff 273 movi d18, #0x00000000000000ff 275 movi d3, #0x00000000000000f [all...] |
/external/python/cpython2/Modules/_ctypes/libffi/src/xtensa/ |
sysv.S | 65 movi a8, ffi_prep_args 71 movi a10, 6*4 98 movi a5, FFI_TYPE_STRUCT 100 movi a5, 16 117 movi a6, store_calls 221 movi a8, ffi_closure_SYSV_inner 232 movi a11, FFI_TYPE_UINT8 237 1: movi a11, FFI_TYPE_SINT8 242 1: movi a11, FFI_TYPE_UINT16 247 1: movi a11, FFI_TYPE_SINT1 [all...] |