| /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
| fcopysign.ll | 17 ; CHECK-EL: mtc1 $[[LO0]], $f0
18 ; CHECK-EL: mtc1 $[[OR]], $f1
30 ; CHECK-EB: mtc1 $[[OR]], $f0
31 ; CHECK-EB: mtc1 $[[LO0]], $f1
50 ; CHECK-EL: mtc1 $[[T4]], $f0
|
| 2008-08-04-Bitconvert.ll | 2 ; RUN: grep mtc1 %t | count 1
|
| /external/llvm/test/CodeGen/Mips/ |
| fp64a.ll | 3 ; use mfc1/mtc1 to move the bottom 32-bits (because the hardware will redirect
34 ; 32R2-NO-FP64A-LE: mtc1 $4, $f0
38 ; 32R2-NO-FP64A-BE: mtc1 $5, $f0
55 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
58 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
75 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
78 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
95 ; 32R2-NO-FP64A-LE: mtc1 $6, $f0
98 ; 32R2-NO-FP64A-BE: mtc1 $7, $f0
116 ; 32R2-NO-FP64A-LE-DAG: mtc1 $4, $[[T0:f[0-9]+]
[all...] |
| int-to-float-conversion.ll | 9 ; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
19 ; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
22 ; 64: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
|
| select.ll | 135 ; 32-DAG: mtc1 $5, $[[F0:f[0-9]+]]
136 ; 32-DAG: mtc1 $6, $[[F1:f0]]
139 ; 32R2-DAG: mtc1 $5, $[[F0:f[0-9]+]]
140 ; 32R2-DAG: mtc1 $6, $[[F1:f0]]
143 ; 32R6-DAG: mtc1 $5, $[[F0:f[0-9]+]]
144 ; 32R6-DAG: mtc1 $6, $[[F1:f[0-9]+]]
146 ; 32R6: mtc1 $[[T0]], $[[CC:f0]]
156 ; 64R6: mtc1 $[[T0]], $[[CC:f0]]
168 ; 32-DAG: mtc1 $6, $[[F0:f[1-3]*[02468]+]]
169 ; 32-DAG: mtc1 $7, $[[F0H:f[1-3]*[13579]+]
[all...] |
| fcopysign.ll | 16 ; 32: mtc1 $[[OR]], $f1
49 ; 32: mtc1 $[[OR]], $f0
53 ; 32R2: mtc1 $[[INS]], $f0
|
| mno-ldc1-sdc1.ll | 68 ; 32R1-LE-PIC-DAG: mtc1 $[[R0]], $f0
69 ; 32R1-LE-PIC-DAG: mtc1 $[[R1]], $f1
73 ; 32R2-LE-PIC-DAG: mtc1 $[[R0]], $f0
78 ; 32R6-LE-PIC-DAG: mtc1 $[[R0]], $f0
85 ; 32R1-LE-STATIC-DAG: mtc1 $[[R1]], $f0
86 ; 32R1-LE-STATIC-DAG: mtc1 $[[R3]], $f1
92 ; 32R2-LE-STATIC-DAG: mtc1 $[[R1]], $f0
99 ; 32R6-LE-STATIC-DAG: mtc1 $[[R1]], $f0
104 ; 32R1-BE-PIC-DAG: mtc1 $[[R1]], $f0
105 ; 32R1-BE-PIC-DAG: mtc1 $[[R0]], $f
[all...] |
| /external/valgrind/none/tests/mips64/ |
| change_fp_mode.c | 23 "mtc1 $t0, $f0\n\t" \
24 "mtc1 $t0, $f1\n\t" \
73 "mtc1 $t0, $f0\n\t" \
74 "mtc1 $t0, $f1\n\t" \
113 "mtc1 $t0, $f0\n\t" \
115 "mtc1 $t0, $f1\n\t" \
142 "mtc1 $t0, $f1\n\t"
196 TEST_MT("mtc1 $t0, $f0");
197 TEST_MT("mtc1 $t0, $f1");
|
| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| simplestorefp1.ll | 21 ; CHECK: mtc1 $[[REG2]], $f[[REG3:[0-9]+]]
37 ; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
46 ; mips32: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
47 ; mips32: mtc1 $[[REG2a]], $f{{[0-9]+}}
|
| callabi.ll | 294 ; ALL: mtc1 $[[REG_FPCONST]], $f12
309 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
312 ; ALL-DAG: mtc1 $[[REG_FPCONST_3]], $f14
327 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
343 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
360 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
382 ; ALL-DAG: mtc1 $[[REG_FPCONST_4]], $f12
383 ; 32R1-DAG: mtc1 $[[REG_FPCONST_2]], $f13
401 ; ALL-DAG: mtc1 $[[REG_FPCONST_4]], $f12
402 ; 32R1-DAG: mtc1 $[[REG_FPCONST_2]], $f1
[all...] |
| /external/valgrind/none/tests/mips32/ |
| MoveIns.c | 77 // mtc1 rt, fs
165 "mtc1 $t0, $f0\n\t" \
166 "mtc1 $t1, $f2\n\t" \
187 "mtc1 $t0, $f0\n\t" \
188 "mtc1 $t1, $f2\n\t" \
211 "mtc1 $t0, $f0 \n\t" \
212 "mtc1 $t1, $f2 \n\t" \
237 "mtc1 $0, $" #FD "\n\t" \
258 "mtc1 $0, $" #FD "\n\t" \
259 "mtc1 $0, $" #FD + 1"\n\t"
[all...] |
| change_fp_mode.c | 26 "mtc1 $t0, $f1\n\t"
|
| MoveIns.stdout.exp | 29 MTC1
30 mtc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
31 mtc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
32 mtc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
33 mtc1 $t4, $f3 :: fs 0.000000, rt 0x0
34 mtc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
35 mtc1 $t6, $f5 :: fs 0.000000, rt 0x0
36 mtc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
37 mtc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
38 mtc1 $v1, $f8 :: fs nan, rt 0xfffffff
[all...] |
| MoveIns.stdout.exp-BE | 29 MTC1
30 mtc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
31 mtc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
32 mtc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
33 mtc1 $t4, $f3 :: fs 0.000000, rt 0x0
34 mtc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
35 mtc1 $t6, $f5 :: fs 0.000000, rt 0x0
36 mtc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
37 mtc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
38 mtc1 $v1, $f8 :: fs nan, rt 0xfffffff
[all...] |
| MoveIns.stdout.exp-mips32r2-BE | 29 MTC1
30 mtc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
31 mtc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
32 mtc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
33 mtc1 $t4, $f3 :: fs 0.000000, rt 0x0
34 mtc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
35 mtc1 $t6, $f5 :: fs 0.000000, rt 0x0
36 mtc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
37 mtc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
38 mtc1 $v1, $f8 :: fs nan, rt 0xfffffff
[all...] |
| MoveIns.stdout.exp-mips32r2-LE | 29 MTC1
30 mtc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
31 mtc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
32 mtc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
33 mtc1 $t4, $f3 :: fs 0.000000, rt 0x0
34 mtc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
35 mtc1 $t6, $f5 :: fs 0.000000, rt 0x0
36 mtc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
37 mtc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
38 mtc1 $v1, $f8 :: fs nan, rt 0xfffffff
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips16-intermix.s | 422 mtc1 $7,$f2
423 mtc1 $6,$f3
466 mtc1 $7,$f2
467 mtc1 $6,$f3
509 mtc1 $7,$f2
510 mtc1 $6,$f3
552 mtc1 $7,$f2
553 mtc1 $6,$f3
595 mtc1 $7,$f2
596 mtc1 $6,$f
[all...] |
| lif-svr4pic.d | 29 0+0030 <[^>]*> mtc1 at,\$f4
|
| lif-xgot.d | 29 0+0030 <[^>]*> mtc1 at,\$f4
|
| micromips@mips32-sf32.d | 12 [0-9a-f]+ <[^>]*> 5421 283b mtc1 \$1,\$f1
|
| mips32-sf32.d | 11 0+0004 <[^>]*> 44810800 mtc1 \$1,\$f1
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| mips16-intermix-2.s | 422 mtc1 $7,$f2
423 mtc1 $6,$f3
466 mtc1 $7,$f2
467 mtc1 $6,$f3
509 mtc1 $7,$f2
510 mtc1 $6,$f3
552 mtc1 $7,$f2
553 mtc1 $6,$f3
595 mtc1 $7,$f2
596 mtc1 $6,$f
[all...] |
| /art/runtime/interpreter/mterp/mips/ |
| op_double_to_long.S | 27 mtc1 zero, fa1
|
| op_float_to_long.S | 26 mtc1 t0, fa1
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| bitcast.ll | 54 ; MIPS32-O2: mtc1 $a0, $f{{[0-9]+}}
107 ; MIPS32-O2: mtc1 $a0, $f{{[0-9]+}}
108 ; MIPS32-O2: mtc1 $a1, $f{{[0-9]+}}
131 ; MIPS32-O2: mtc1 {{.*}}, $f{{[0-9]+}}
132 ; MIPS32-O2: mtc1 {{.*}}, $f{{[0-9]+}}
|
