| /external/boringssl/mac-x86_64/crypto/fipsmodule/ |
| x86_64-mont5.S | 37 leaq -280(%rsp,%r9,8),%r10
39 andq $-1024,%r10
49 subq %r10,%r11
51 leaq (%r10,%r11,1),%rsp
53 cmpq %r10,%rsp
60 cmpq %r10,%rsp
64 leaq L$inc(%rip),%r10
70 movdqa 0(%r10),%xmm0
71 movdqa 16(%r10),%xmm1
72 leaq 24-112(%rsp,%r9,8),%r10
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| a2.d | 91 fc: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12
93 104: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12
94 108: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13
95 10c: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13
97 114: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100
110 148: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11
111 14c: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11
112 150: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11
113 154: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11
114 158: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r1
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| Radix4FFT_v5.s | 36 mov r10, r1 @ i = num@
38 cmp r10, #0
49 str r10, [sp, #16]
58 ldrd r10, [r14, #0] @ r2 = xptr[0]@ r3 = xptr[1]@
61 smulwt r4, r10, r8 @ L_mpy_wx(cosx, t0)
65 smulwb r5, r10, r8 @ L_mpy_wx(sinx, t0)
67 mov r10, r0, asr #2 @ t0 = r0 >> 2@
73 sub r0, r10, r2 @ r0 = t0 - r2@
76 add r2, r10, r2 @ r2 = t0 + r2@
82 ldrd r10, [r14, #0] @ r4 = xptr[0]@ r5 = xptr[1]
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| syn_filt_opt.s | 51 LDRH r10, [r4], #2
60 STRH r10, [r5], #2
69 LDRH r10, [r4], #2
78 STRH r10, [r5], #2
96 ORR r10, r6, r7, LSL #16 @ -a[2] -- -a[1]
98 STR r10, [r13, #-4]
107 ORR r10, r6, r7, LSL #16 @ -a[6] -- -a[5]
109 STR r10, [r13, #-12]
118 ORR r10, r6, r7, LSL #16 @ -a[10] -- -a[9]
120 STR r10, [r13, #-20
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-a32.cc | 103 {{lt, r11, r10}, false, al, "lt r11 r10", "lt_r11_r10"},
104 {{vs, r10, r8}, false, al, "vs r10 r8", "vs_r10_r8"},
113 {{cc, r4, r10}, false, al, "cc r4 r10", "cc_r4_r10"},
118 {{ls, r10, r10}, false, al, "ls r10 r10", "ls_r10_r10"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 121 {{al, r7, r8, r10, ROR, 21},
124 "al r7 r8 r10 ROR 21",
131 {{al, r14, r13, r10, LSL, 22},
134 "al r14 r13 r10 LSL 22",
136 {{al, r9, r10, r11, ROR, 2},
139 "al r9 r10 r11 ROR 2",
206 {{al, r7, r10, r10, ROR, 19},
209 "al r7 r10 r10 ROR 19"
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32.cc | 130 {{al, r3, r4, r10}, false, al, "al r3 r4 r10", "al_r3_r4_r10"},
140 {{al, r10, r6, r7}, false, al, "al r10 r6 r7", "al_r10_r6_r7"},
143 {{al, r5, r10, r6}, false, al, "al r5 r10 r6", "al_r5_r10_r6"},
149 {{al, r6, r2, r10}, false, al, "al r6 r2 r10", "al_r6_r2_r10"},
151 {{al, r3, r10, r1}, false, al, "al r3 r10 r1", "al_r3_r10_r1"}
[all...] |
| test-assembler-cond-rd-operand-rn-t32-in-it-block.cc | 106 {{eq, r0, r10}, true, eq, "eq r0 r10", "eq_r0_r10"},
121 {{eq, r1, r10}, true, eq, "eq r1 r10", "eq_r1_r10"},
136 {{eq, r2, r10}, true, eq, "eq r2 r10", "eq_r2_r10"},
151 {{eq, r3, r10}, true, eq, "eq r3 r10", "eq_r3_r10"},
166 {{eq, r4, r10}, true, eq, "eq r4 r10", "eq_r4_r10"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 127 {{gt, r1, r7, r10, ROR, 16},
130 "gt r1 r7 r10 ROR 16",
202 {{al, r4, r10, r4, ROR, 8},
205 "al r4 r10 r4 ROR 8",
242 {{hi, r10, r2, r2, ROR, 16},
245 "hi r10 r2 r2 ROR 16",
267 {{ne, r4, r7, r10, ROR, 16},
270 "ne r4 r7 r10 ROR 16",
327 {{le, r0, r10, r9, ROR, 0},
330 "le r0 r10 r9 ROR 0"
[all...] |
| test-assembler-cond-rd-rn-rm-t32.cc | 154 {{al, r1, r2, r10}, false, al, "al r1 r2 r10", "al_r1_r2_r10"},
157 {{al, r6, r9, r10}, false, al, "al r6 r9 r10", "al_r6_r9_r10"},
165 {{al, r10, r3, r13}, false, al, "al r10 r3 r13", "al_r10_r3_r13"},
166 {{al, r10, r10, r2}, false, al, "al r10 r10 r2", "al_r10_r10_r2"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-a32.cc | 130 {{ge, r5, r11, r10}, false, al, "ge r5 r11 r10", "ge_r5_r11_r10"},
133 {{eq, r1, r10, r13}, false, al, "eq r1 r10 r13", "eq_r1_r10_r13"},
139 {{le, r3, r9, r10}, false, al, "le r3 r9 r10", "le_r3_r9_r10"},
143 {{eq, r9, r14, r10}, false, al, "eq r9 r14 r10", "eq_r9_r14_r10"},
150 {{vc, r10, r8, r14}, false, al, "vc r10 r8 r14", "vc_r10_r8_r14"}
[all...] |
| /external/boringssl/win-x86_64/crypto/fipsmodule/ |
| x86_64-mont.asm | 57 lea r10,[((-16))+r9*8+rsp]
59 and r10,-1024
69 sub r11,r10
71 lea rsp,[r11*1+r10]
73 cmp rsp,r10
81 cmp rsp,r10
98 mov r10,rax
101 imul rbp,r10
105 add r10,rax
119 mov r11,r10
[all...] |
| /external/boringssl/src/ssl/test/runner/curve25519/ |
| ladderstep_amd64.s | 22 MOVQ DX,R10
27 ADDQ ·_2P1234(SB),R10
37 SUBQ 88(DI),R10
47 MOVQ R10,48(SP)
63 MOVQ AX,R10
77 ADDQ AX,R10
116 ADDQ AX,R10
129 SHLQ $13,R11:R10
130 ANDQ DX,R10
131 ADDQ R9,R10
[all...] |
| /prebuilts/go/darwin-x86/src/vendor/golang_org/x/crypto/curve25519/ |
| ladderstep_amd64.s | 22 MOVQ DX,R10
27 ADDQ ·_2P1234(SB),R10
37 SUBQ 88(DI),R10
47 MOVQ R10,48(SP)
63 MOVQ AX,R10
77 ADDQ AX,R10
116 ADDQ AX,R10
129 SHLQ $13,R11:R10
130 ANDQ DX,R10
131 ADDQ R9,R10
[all...] |
| /prebuilts/go/linux-x86/src/vendor/golang_org/x/crypto/curve25519/ |
| ladderstep_amd64.s | 22 MOVQ DX,R10
27 ADDQ ·_2P1234(SB),R10
37 SUBQ 88(DI),R10
47 MOVQ R10,48(SP)
63 MOVQ AX,R10
77 ADDQ AX,R10
116 ADDQ AX,R10
129 SHLQ $13,R11:R10
130 ANDQ DX,R10
131 ADDQ R9,R10
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/ |
| longjmp.s | 25 add r10 = 0x10*20 + 8*14, in0
28 ld8.nt1 r14 = [r10], -8*2 // BSP, skip PFS
31 ld8.nt1 r17 = [r10], -8 // UNAT after spill
35 ld8.nt1 r18 = [r10], -8 // UNAT
36 ld8.nt1 r25 = [r10], -8 // b5
40 ld8.nt1 r24 = [r10], -8 // b4
44 ld8.nt1 r23 = [r10], -8 // b3
59 ld8.nt1 r22 = [r10], -8
63 ld8.nt1 r21 = [r10], -8
66 ld8.nt1 r20 = [r10], -0x10 // skip sp
[all...] |
| CpuFlushTlb.s | 37 extr.u r14 = r10, 32, 32 // r14 <- count1
40 extr.u r10 = r10, 0, 32 // r10 <- count2
41 add r10 = -1, r10
45 mov ar.lc = r10 // LC <- count2
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
| LongJmp.s | 24 add r10 = 0x10*20 + 8*14, in0
27 ld8.nt1 r14 = [r10], -8*2 // BSP, skip PFS
30 ld8.nt1 r17 = [r10], -8 // UNAT after spill
34 ld8.nt1 r18 = [r10], -8 // UNAT
35 ld8.nt1 r25 = [r10], -8 // b5
39 ld8.nt1 r24 = [r10], -8 // b4
43 ld8.nt1 r23 = [r10], -8 // b3
58 ld8.nt1 r22 = [r10], -8
62 ld8.nt1 r21 = [r10], -8
65 ld8.nt1 r20 = [r10], -0x10 // skip sp
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseCpuLib/Ipf/ |
| CpuFlushTlb.s | 36 extr.u r14 = r10, 32, 32 // r14 <- count1
39 extr.u r10 = r10, 0, 32 // r10 <- count2
40 add r10 = -1, r10
44 mov ar.lc = r10 // LC <- count2
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/tile/ |
| tile.S | 83 #define FRAME_SIZE r10
231 On entry, lr points to the closure plus 8 bytes, and r10
252 /* Save return address (in r10 due to closure stub wrapper). */
253 SW sp, r10
254 .cfi_return_column r10
255 .cfi_offset r10, 0
258 addli r10, sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
262 SW r10, sp
271 addi r10, sp, LINKAGE_SIZE
275 STORE_REG(r0, r10)
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| divdi3.S | 25 stmfd sp!, {r10, r11}
26 mov r10, r1, asr #31
28 mov r11, r10
30 eor r0, r0, r10
31 eor r1, r1, r10
37 subs r0, r0, r10
41 eor r2, r10, r4
42 eor r3, r10, r4
48 ldmfd sp!, {r10, r11}
|
| muldi3.S | 22 stmfd sp!, {r8, r10, r11}
30 add r10, ip, lr, lsr #16
31 and ip, r10, r11
37 mov r5, r10, lsr #16
38 add r10, ip, r4, lsr #16
39 and ip, r10, r11
43 add ip, r5, r10, lsr #16
47 mov r10, r4
52 ldmfd sp!, {r8, r10, r11}
|
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| pitch_filter_armv6.S | 47 mov r10, r7, asl #1
48 add r12, r10 @ &outputBuf[*index2]
49 add r8, r10 @ &inputBuf[*index2]
68 @ r4, r5, r7, r10, r11: scratch
73 ldr r10, [r3], #4 @ ubufQQpos2[*index2 + 0, *index2 + 1]
77 smuad r2, r10, r4
80 ldr r10, [r3], #4
84 smlad r2, r10, r4, r2
85 ldrh r10, [r3], #-14 @ r3 back to &ubufQQpos2[*index2].
88 smlabb r2, r10, r4, r
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S | 45 LDR r10, .LarmVCM4P10_QPDivTable
46 P1: ADD r10, pc
50 LDRSB lr,[r10,r1]
51 LDR r10, =0x3020504
55 VDUP.32 d9,r10
65 LDRSH r10,[r8,#0]
71 VMOVNE.16 d0[0],r10
105 LDRSH r10,[r8,#0]
106 ADD r10,r10,#0x2
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cfi/ |
| cfi-s390x-1.s | 16 .cfi_offset %r10,-80
23 lgr %r10,%r4
29 lgfr %r10,%r10
31 lgr %r4,%r10
|
