| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mmix/ |
| bpo-13.d | 6 #error: base-plus-offset relocation against register symbol
8 # Check that we get an error message if we see a BPO against a register
9 # symbol. Variant 2: a register symbol.
|
| bpo-13m.d | 6 #error: base-plus-offset relocation against register symbol
8 # Check that we get an error message if we see a BPO against a register
9 # symbol. Variant 2: a register symbol.
|
| local10.d | 5 #error: 254 is not a local register
|
| local10m.d | 5 #error: 254 is not a local register
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 217 void Addu(Register rd, Register rs, Register rt);
218 void Addiu(Register rt, Register rs, uint16_t imm16);
219 void Subu(Register rd, Register rs, Register rt);
221 void MultR2(Register rs, Register rt); // R
[all...] |
| /art/test/430-live-register-slow-path/ |
| info.txt | 1 Regression test for the linear scan register allocator. It used
|
| /art/test/439-swap-double/ |
| info.txt | 2 the presence of register pairs (in this case, doubles on ARM).
|
| /art/test/440-stmp/ |
| info.txt | 2 a S/D register a temp, while it conflicted with the
|
| /external/clang/test/CodeGen/ |
| asm-variable.c | 7 register unsigned long long result asm("rax");
8 register unsigned long long b0 asm("rdi");
9 register unsigned long long b1 asm("rsi");
10 register unsigned long long b2 asm("rdx");
11 register unsigned long long b3 asm("rcx");
12 register unsigned long long b4 asm("r8");
13 register unsigned long long b5 asm("r9");
33 register double b0 asm("xmm0");
34 register double b1 asm("xmm1");
35 register double b2 asm("xmm2")
[all...] |
| /external/llvm/test/CodeGen/MIR/X86/ |
| expected-register-after-flags.mir | 2 # This test ensures that an error is reported when a register operand doesn't
3 # follow register flags.
17 ; CHECK: [[@LINE+1]]:33: expected a register after register flags
|
| /external/ltp/testcases/network/rpc/rpc-tirpc/tests_pack/rpc_suite/rpc/rpc_regunreg_registerrpc/ |
| assertions.xml | 3 Register a service using registerrpc() function
|
| /external/v8/src/x64/ |
| codegen-x64.h | 20 Register string,
21 Register index,
22 Register result,
39 Register base_reg,
52 Register base_reg,
53 Register argument_count_reg,
65 Register base_reg,
86 const Register base_reg_;
87 const Register argument_count_reg_;
|
| /external/valgrind/memcheck/tests/ |
| supp.c | 6 volatile int x; /* make sure it isn't in a register */
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| insn-error-a.l | 2 [^:]*:4: Error: ARM register expected -- `movne r33,r9'
|
| iwmmxt-bad.l | 3 [^:]*:2: Error: iWMMXt data register expected -- `wldrb wcgr0,\[r1\]'
4 [^:]*:3: Error: iWMMXt data register expected -- `wldrh wcgr0,\[r1\]'
5 [^:]*:4: Error: iWMMXt data register expected -- `wldrd wcgr0,\[r1\]'
7 [^:]*:6: Error: iWMMXt data register expected -- `wstrb wcgr0,\[r1\]'
8 [^:]*:7: Error: iWMMXt data register expected -- `wstrh wcgr0,\[r1\]'
9 [^:]*:8: Error: iWMMXt data register expected -- `wstrd wcgr0,\[r1\]'
10 [^:]*:9: Error: iWMMXt control register expected -- `tmcr wibble,r1'
11 [^:]*:10: Error: iWMMXt data or control register expected -- `wldrw wibble,\[r1\]'
12 [^:]*:11: Error: iWMMXt data or control register expected -- `wstrw wibble,\[r1\]'
|
| srs-arm.l | 2 [^:]*:12: Error: SRS base register must be r13 -- `srsdb r4,#13'
3 [^:]*:13: Error: SRS base register must be r13 -- `srsda r4,#13'
4 [^:]*:14: Error: SRS base register must be r13 -- `srsia r4,#13'
5 [^:]*:15: Error: SRS base register must be r13 -- `srsib r4,#13'
6 [^:]*:24: Error: SRS base register must be r13 -- `srsea r4,#13'
7 [^:]*:25: Error: SRS base register must be r13 -- `srsfd r4,#13'
8 [^:]*:26: Error: SRS base register must be r13 -- `srsfa r4,#13'
9 [^:]*:27: Error: SRS base register must be r13 -- `srsed r4,#13'
10 [^:]*:30: Error: SRS base register must be r13 -- `srs r4,#13'
|
| thumb2_ldmstm_bad.l | 4 [^:]*:8: Error: LR and PC should not both be in register list -- `ldmia r1,{r14,r15}'
5 [^:]*:9: Error: having the base register in the register list when using write back is UNPREDICTABLE -- `ldmia r0!,{r0-r3}'
7 [^:]*:13: Error: having the base register in the register list when using write back is UNPREDICTABLE -- `ldmiaeq r0!,{r0,r1}'
8 [^:]*:17: Error: having the base register in the register list when using write back is UNPREDICTABLE -- `stmia.w r0!,{r0-r3}'
12 [^:]*:21: Error: having the base register in the register list when using write back is UNPREDICTABLE -- `stmia r8!,{r0-r11}'
|
| t16-bad.l | 2 [^:]*:36: Error: lo register required -- `tst r8,r0'
3 [^:]*:36: Error: lo register required -- `tst r0,r8'
4 [^:]*:36: Error: unshifted register required -- `tst r0,#12'
5 [^:]*:36: Error: unshifted register required -- `tst r0,r1,lsl#2'
6 [^:]*:36: Error: unshifted register required -- `tst r0,r1,lsl r3'
7 [^:]*:37: Error: lo register required -- `cmn r8,r0'
8 [^:]*:37: Error: lo register required -- `cmn r0,r8'
9 [^:]*:37: Error: unshifted register required -- `cmn r0,#12'
10 [^:]*:37: Error: unshifted register required -- `cmn r0,r1,lsl#2'
11 [^:]*:37: Error: unshifted register required -- `cmn r0,r1,lsl r3
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-crx/ |
| reloc-regrel12.s | 1 # Test register relative relocation R_CRX_REGREL12
|
| reloc-regrel22.s | 1 # Test register relative relocation R_CRX_REGREL22
|
| reloc-regrel28.s | 1 # Test register relative relocation R_CRX_REGREL28
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_transform.h | 95 * Helper for emitting temporary register declarations.
228 reg->Register.File = file;
229 reg->Register.Index = index;
230 reg->Register.WriteMask = writemask;
239 reg->Register.File = file;
240 reg->Register.Index = index;
241 reg->Register.SwizzleX = swizzleX;
242 reg->Register.SwizzleY = swizzleY;
243 reg->Register.SwizzleZ = swizzleZ;
244 reg->Register.SwizzleW = swizzleW;
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.h | 56 V(Ldrb, Register&, rt, LDRB_w) \
57 V(Strb, Register&, rt, STRB_w) \
58 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
59 V(Ldrh, Register&, rt, LDRH_w) \
60 V(Strh, Register&, rt, STRH_w) \
61 V(Ldrsh, Register&, rt, rt.Is64Bits() ? LDRSH_x : LDRSH_w) \
64 V(Ldrsw, Register&, rt, LDRSW_x)
91 inline MemOperand FieldMemOperand(Register object, int offset);
92 inline MemOperand UntagSmiFieldMemOperand(Register object, int offset);
95 inline MemOperand UntagSmiMemOperand(Register object, int offset)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| VirtRegMap.h | 1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
10 // This file implements a virtual register map. This maps virtual registers to
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
46 /// Virt2PhysMap - This is a virtual to physical register
47 /// mapping. Each virtual register is required to have an entry in
48 /// it; even spilled virtual registers (the register mapped to a
49 /// spilled register is the temporary used to load it from the
53 /// Virt2StackSlotMap - This is virtual register to stack slot
54 /// mapping. Each spilled virtual register has an entry in i
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
| VirtRegMap.h | 1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
10 // This file implements a virtual register map. This maps virtual registers to
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
46 /// Virt2PhysMap - This is a virtual to physical register
47 /// mapping. Each virtual register is required to have an entry in
48 /// it; even spilled virtual registers (the register mapped to a
49 /// spilled register is the temporary used to load it from the
53 /// Virt2StackSlotMap - This is virtual register to stack slot
54 /// mapping. Each spilled virtual register has an entry in i
[all...] |
