/external/pcre/dist2/src/sljit/ |
sljitNativeMIPS_32.c | 328 EMIT_SHIFT(SLL, SLLV);
|
sljitNativeMIPS_64.c | 423 EMIT_SHIFT(DSLL, DSLL32, SLL, DSLLV, SLLV);
|
/external/llvm/test/MC/Disassembler/Mips/mips4/ |
valid-mips4.txt | 66 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9 67 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
/external/valgrind/VEX/priv/ |
host_mips_isel.c | [all...] |
/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
valid-mips64r2.txt | 84 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5 109 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9 110 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
valid-mips64r3.txt | 81 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5 106 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9 107 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
valid-mips64r3-el.txt | 212 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
valid-mips64r5.txt | 81 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5 106 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9 107 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
valid-mips64r5-el.txt | 212 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/swiftshader/third_party/subzero/src/ |
IceAssemblerMIPS32.cpp | 986 void AssemblerMIPS32::sllv(const Operand *OpRd, const Operand *OpRt, function in class:Ice::MIPS32::AssemblerMIPS32 989 emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "sllv"); [all...] |
IceInstMIPS32.cpp | 131 template <> const char *InstMIPS32Sllv::Opcode = "sllv"; [all...] |
IceInstMIPS32.h | 262 Sllv, [all...] |
/external/v8/src/mips/ |
constants-mips.h | 415 SLLV = ((0U << 3) + 4), 929 FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(SRLV) | [all...] |
disasm-mips.cc | 1074 case SLLV: 1075 Format(instr, "sllv 'rd, 'rt, 'rs"); [all...] |
/external/v8/src/mips64/ |
constants-mips64.h | 398 SLLV = ((0U << 3) + 4), 968 FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(DSLLV) | [all...] |
/prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
rewriteMIPS64.go | [all...] |
/prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
rewriteMIPS64.go | [all...] |
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
valid-el.txt | 83 0x65 0x00 0x10 0x10 # CHECK: sllv $2, $3, $5
|
valid.txt | 83 0x00 0x65 0x10 0x10 # CHECK: sllv $2, $3, $5
|
/external/llvm/test/MC/Disassembler/Mips/mips32/ |
valid-mips32-el.txt | 131 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
valid-mips32r2-el.txt | 149 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
valid-mips32r3-el.txt | 145 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
valid-mips32r5-el.txt | 145 0x04 0x10 0xa3 0x00 # CHECK: sllv $2, $3, $5
|
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
8bit.pnacl.ll | 291 ; MIPS32: sllv
|
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.h | 315 void SLLV(int Rd, int Rt, int Rs);
|