| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| TailDuplication.cpp | 238 unsigned SrcReg = LI->second[j].second;
239 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
351 unsigned SrcReg = MI.getOperand(i).getReg();
352 UsedByPhi->insert(SrcReg);
385 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
387 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
392 Copies.push_back(std::make_pair(NewDef, SrcReg));
493 unsigned SrcReg = LI->second[j].second;
495 II->getOperand(Idx).setReg(SrcReg);
499 II->addOperand(MachineOperand::CreateReg(SrcReg, false))
[all...] |
| MachineSink.cpp | 114 unsigned SrcReg = MI->getOperand(1).getReg();
116 if (!TargetRegisterInfo::isVirtualRegister(SrcReg) ||
118 !MRI->hasOneNonDBGUse(SrcReg))
121 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
126 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
131 MRI->replaceRegWith(DstReg, SrcReg);
|
| /external/swiftshader/third_party/subzero/src/ |
| IceInstX86BaseImpl.h | 741 GPRRegister SrcReg = SrcCanBeByte
744 (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
782 GPRRegister SrcReg = Traits::getEncodedGPR(SrcVar->getRegNum());
783 (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
837 GPRRegister SrcReg = Traits::getEncodedGPR(SrcVar->getRegNum());
838 (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
861 GPRRegister SrcReg = Traits::getEncodedGPR(SrcVar1->getRegNum());
865 (Asm->*(Emitter.GPRGPRImm))(Ty, DestReg, SrcReg,
869 (Asm->*(Emitter.GPRGPR))(Ty, DestReg, SrcReg);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 196 unsigned &SrcReg, unsigned &DstReg,
330 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
334 unsigned SrcReg, bool isKill, int FrameIndex,
338 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
500 /// in SrcReg and SrcReg2 if having two register operands, and the value it
503 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
510 bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsOptimizePICCall.cpp | 134 unsigned SrcReg = I->getOperand(0).getReg();
135 unsigned DstReg = getRegTy(SrcReg, MF) == MVT::i32 ? Mips::T9 : Mips::T9_64;
137 .addReg(SrcReg);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXSwapRemoval.cpp | 137 unsigned lookThruCopyLike(unsigned SrcReg, unsigned VecIdx);
152 // Insert a swap instruction from SrcReg to DstReg at the given
155 unsigned DstReg, unsigned SrcReg);
546 // the original SrcReg unless it is the target of a copy-like
552 unsigned PPCVSXSwapRemoval::lookThruCopyLike(unsigned SrcReg,
554 MachineInstr *MI = MRI->getVRegDef(SrcReg);
556 return SrcReg;
790 // FIXME: When inserting a swap, we should check whether SrcReg is
791 // defined by another swap: SrcReg = XXPERMDI Reg, Reg, 2; If so,
795 unsigned DstReg, unsigned SrcReg) {
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 182 unsigned SrcReg = MI.getOperand(2).getReg();
183 unsigned SrcEvenReg = getSubReg(SrcReg, SP::sub_even64);
184 unsigned SrcOddReg = getSubReg(SrcReg, SP::sub_odd64);
|
| /external/mesa3d/src/mesa/program/ |
| program.c | 473 if (inst->SrcReg[j].File == file) {
474 assert(inst->SrcReg[j].Index < (GLint) usedSize);
475 if (inst->SrcReg[j].Index < (GLint) usedSize)
476 used[inst->SrcReg[j].Index] = GL_TRUE;
|
| program_parse.y | 204 %type <src_reg> srcReg scalarUse scalarSrcReg swizzleSrcReg
536 SWZ_instruction: SWZ maskedDstReg ',' srcReg ',' extendedSwizzle
558 scalarUse: srcReg scalarSuffix
567 swizzleSrcReg: optionalSign srcReg swizzleSuffix
724 srcReg: USED_IDENTIFIER /* temporaryReg | progParamSingle */
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUInstrInfo.cpp | 126 unsigned DestReg, unsigned SrcReg,
135 .addReg(SrcReg, getKillRegState(KillSrc));
141 unsigned SrcReg, bool isKill, int FrameIdx,
170 .addReg(SrcReg, getKillRegState(isKill)), FrameIdx);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 86 unsigned DestReg, unsigned SrcReg,
89 .addReg(SrcReg, getKillRegState(KillSrc)).addReg(MBlaze::R0);
94 unsigned SrcReg, bool isKill, int FI,
98 BuildMI(MBB, I, DL, get(MBlaze::SWI)).addReg(SrcReg,getKillRegState(isKill))
|
| MBlazeInstrInfo.h | 213 unsigned DestReg, unsigned SrcReg,
217 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrInfo.h | 167 unsigned &SrcReg, unsigned &DstReg,
223 unsigned DestReg, unsigned SrcReg,
227 unsigned SrcReg, bool isKill, int FrameIndex,
231 virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
|
| X86InstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsInstrInfo.h | 160 unsigned DestReg, unsigned SrcReg,
164 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FunctionLoweringInfo.cpp | 460 unsigned SrcReg = ValueMap[V];
461 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
465 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
497 unsigned SrcReg = ValueMap[V];
498 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
502 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 121 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
129 MachineBasicBlock::iterator MI, unsigned SrcReg,
473 /// Copy a value from a VGPR (\p SrcReg) to SGPR. This function can only
474 /// be used when it is know that the value in SrcReg is same across all
476 /// \returns The SGPR register that \p SrcReg was copied to.
477 unsigned readlaneVGPRToSGPR(unsigned SrcReg, MachineInstr &UseMI,
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 169 unsigned SrcReg, bool KillSrc,
176 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
181 unsigned SrcReg, bool isKill, int FrameIndex,
250 /// in SrcReg and SrcReg2 if having two register operands, and the value it
253 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
261 bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
|
| ARMAsmPrinter.cpp | [all...] |
| /external/mesa3d/src/mesa/tnl/ |
| t_vertex_sse.c | 305 struct x86_reg srcREG,
314 x86_mov(&p->func, srcREG, ptr_to_src);
318 struct x86_reg srcREG,
329 x86_lea(&p->func, srcREG, x86_make_disp(srcREG, a->inputstride));
333 x86_mov(&p->func, ptr_to_src, srcREG);
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| FunctionLoweringInfo.cpp | 301 unsigned SrcReg = ValueMap[V];
302 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
306 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
338 unsigned SrcReg = ValueMap[V];
339 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
343 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMFastISel.cpp | 177 bool ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr);
183 unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg);
184 unsigned ARMMoveToIntReg(EVT VT, unsigned SrcReg);
475 unsigned ARMFastISel::ARMMoveToFPReg(EVT VT, unsigned SrcReg) {
481 .addReg(SrcReg));
485 unsigned ARMFastISel::ARMMoveToIntReg(EVT VT, unsigned SrcReg) {
491 .addReg(SrcReg));
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsTargetStreamer.cpp | 192 void MipsTargetStreamer::emitAddu(unsigned DstReg, unsigned SrcReg,
195 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(),
199 void MipsTargetStreamer::emitDSLL(unsigned DstReg, unsigned SrcReg,
203 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
207 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
231 unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,
235 emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
260 emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
266 unsigned Opcode, unsigned SrcReg, unsigned BaseReg, MCOperand &HiOperand,
277 emitRRX(Opcode, SrcReg, ATReg, LoOperand, IDLoc, STI)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 131 unsigned SrcReg = MI->getOperand(1).getReg();
135 if (DstReg != SrcReg)
137 .addReg(SrcReg)
141 .addReg(SrcReg, RegState::Kill)
144 if (DstReg != SrcReg)
146 .addReg(SrcReg)
150 .addReg(SrcReg, RegState::Kill)
153 if (DstReg != SrcReg)
155 .addReg(SrcReg)
159 .addReg(SrcReg, RegState::Kill
[all...] |
