| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCDuplexInfo.cpp | 406 // Rd = sxth/sxtb/zxtb/zxth(Rs)
521 // Rd = sxth/sxtb/zxtb/zxth(Rs)
943 break; // 1,2 SUBInst $Rd = sxtb($Rs)
[all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | 279 __ Add(sp, sp, Operand(x17, SXTB));
326 __ Mvn(x11, Operand(x2, SXTB, 1));
501 __ Mov(x24, Operand(x13, SXTB, 1));
555 __ Mov(w20, Operand(w11, SXTB, 1));
639 __ Orr(w10, w0, Operand(w1, SXTB));
733 __ Orn(w10, w0, Operand(w1, SXTB));
800 __ And(w10, w0, Operand(w1, SXTB));
938 __ Bic(w10, w0, Operand(w1, SXTB));
1062 __ Eor(w10, w0, Operand(w1, SXTB));
1129 __ Eon(w10, w0, Operand(w1, SXTB));
[all...] |
| test-disasm-aarch64.cc | 430 COMPARE(adds(w15, w16, Operand(w17, SXTB, 4)), "adds w15, w16, w17, sxtb #4");
431 COMPARE(add(x18, x19, Operand(x20, SXTB, 3)), "add x18, x19, w20, sxtb #3");
456 COMPARE(subs(w15, w16, Operand(w17, SXTB, 4)), "subs w15, w16, w17, sxtb #4");
457 COMPARE(sub(x18, x19, Operand(x20, SXTB, 3)), "sub x18, x19, w20, sxtb #3");
461 COMPARE(cmp(w0, Operand(w1, SXTB, 1)), "cmp w0, w1, sxtb #1")
[all...] |
| /art/compiler/optimizing/ |
| common_arm64.h | 334 case HDataProcWithShifterOp::kSXTB: return vixl::aarch64::SXTB;
|
| /external/llvm/test/CodeGen/AArch64/ |
| atomic-ops.ll | 504 ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]]
505 ; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxtb
601 ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]]
602 ; CHECK-NEXT: cmp w[[OLD_EXT]], w0, sxtb
[all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-aliases.s | 315 sxtb w1, w2
320 ; CHECK: sxtb w1, w2
325 sxtb x1, w2
332 ; CHECK: sxtb x1, w2
|
| /external/vixl/src/aarch32/ |
| constants-aarch32.cc | 452 return "sxtb";
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| aarch64-asm-2.c | 96 case 496: /* sxtb */
|
| /external/vixl/test/aarch32/ |
| test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 118 M(Sxtb) \
[all...] |
| test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 118 M(Sxtb) \
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb32.d | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 2802 SXTB
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 2802 SXTB
[all...] |
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 119 return Operand(InputRegister32(index), SXTB);
149 return Operand(InputRegister64(index), SXTB);
[all...] |
| /external/v8/src/arm64/ |
| disasm-arm64.cc | 441 mnemonic = "sxtb";
[all...] |
| macro-assembler-arm64-inl.h | 1144 void MacroAssembler::Sxtb(const Register& rd, const Register& rn) {
1147 sxtb(rd, rn);
[all...] |
| /prebuilts/go/darwin-x86/pkg/darwin_amd64/cmd/vendor/golang.org/x/arch/arm/ |
| armasm.a | [all...] |
| /prebuilts/go/linux-x86/pkg/linux_amd64/cmd/vendor/golang.org/x/arch/arm/ |
| armasm.a | [all...] |
| /art/compiler/utils/arm64/ |
| jni_macro_assembler_arm64.cc | 510 ___ Sxtb(reg_w(reg.AsWRegister()), reg_w(reg.AsWRegister()));
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 364 SXTB,
|
| /external/llvm/test/CodeGen/ARM/ |
| load.ll | 100 ; CHECK-T1: sxtb r0, r0
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-thumb2-instructions.s | [all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6intARM.c | 664 TESTINST2("sxtb r0, r1", 0, r0, r1, 0);
665 TESTINST2("sxtb r0, r1", 1, r0, r1, 0);
666 TESTINST2("sxtb r0, r1", 0xff, r0, r1, 0);
667 TESTINST2("sxtb r0, r1", 0xffffffff, r0, r1, 0);
[all...] |
