| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| Intrinsics.td | 208 def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
[all...] |
| /external/clang/test/CodeGen/ |
| aarch64-neon-ldst-one.c | 591 // CHECK: [[VLD2:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0i32(i32* [[TMP2]])
[all...] |
| aarch64-neon-2velem.c | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-neon-2velem.ll | 11 declare <2 x i32> @llvm.aarch64.neon.sqrdmulh.v2i32(<2 x i32>, <2 x i32>)
19 declare <2 x i32> @llvm.aarch64.neon.sqdmulh.v2i32(<2 x i32>, <2 x i32>)
[all...] |
| arm64-neon-copy.ll | 821 define <2 x i32> @scalar_to_vector.v2i32(i32 %a) {
822 ; CHECK-LABEL: scalar_to_vector.v2i32:
[all...] |
| /external/deqp/external/vulkancts/modules/vulkan/spirv_assembly/ |
| vktSpvAsmGraphicsShaderTestUtil.cpp | 368 "%v2i32 = OpTypeVector %i32 2\n" \
386 "%ip_v2i32 = OpTypePointer Input %v2i32\n" \
396 "%op_v2i32 = OpTypePointer Output %v2i32\n" \
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrVSX.td | [all...] |
| PPCISelLowering.h | 151 /// For example v2i32 -> widened to v4i32 -> v2f64
[all...] |
| PPCISelLowering.cpp | 652 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Legal);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | [all...] |
| LegalizeVectorOps.cpp | 399 // same overall length. For example, x86 promotes ISD::AND v2i32 to v1i64.
[all...] |
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 628 DecodePSWAPMask(MVT::v2i32, ShuffleMask);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| README.txt | 1204 def : Pat<(v2i32 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1206 (v2i32 (MMX_MOVDQ2Qrr VR128:$src))>;
[all...] |
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_shader_tgsi_setup.c | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 592 /// containing rubbish. For example, if Op is a v2i32 that was widened to a
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelLowering.cpp | 161 addTypeForNEON(VT, MVT::f64, MVT::v2i32);
448 addDRTypeForNEON(MVT::v2i32);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| README.txt | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 67 case MVT::v2i32:
[all...] |
