| /external/vixl/test/aarch32/traces/ |
| simulator-cond-rd-rn-operand-rm-a32-eors.h | 39 { 0x40000000, 0x00000000, 0x00000000, 0x00000000 },
42 { 0x40000000, 0x00000000, 0x00000000, 0x00000000 },
45 { 0x60000000, 0x00000000, 0x00000000, 0x00000000 },
46 { 0x50000000, 0x00000000, 0x00000000, 0x00000000 }
[all...] |
| simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32-rscs.h | 293 { 0x00000000, 0x7fffc07d, 0x7fffc07d, 0xffff8002 },
298 { 0x00000000, 0x0000401e, 0x0000401e, 0x00007fff },
300 { 0x00000000, 0x40007ffd, 0x40007ffd, 0x80000001 },
304 { 0x00000000, 0x199a1997, 0x199a1997, 0x33333333 },
305 { 0x00000000, 0x000000be, 0x000000be, 0x0000007e },
310 { 0x80000000, 0xfffffffd, 0xfffffffd, 0x00000000 },
323 { 0x00000000, 0x0000007e, 0x0000007e, 0x00000002 },
326 { 0x00000000, 0x7fffc001, 0x7fffc001, 0xffff8001 },
328 { 0x00000000, 0x0000401e, 0x0000401e, 0x00007ffe },
330 { 0x00000000, 0x000000bb, 0x000000bb, 0x0000007d }
[all...] |
| simulator-cond-rd-rn-operand-const-a32-eors.h | 293 { 0x00000000, 0x02ac0000, 0x02ac0000 },
294 { 0x00000000, 0x02ac0001, 0x02ac0001 },
295 { 0x00000000, 0x02ac0002, 0x02ac0002 },
296 { 0x00000000, 0x02ac0020, 0x02ac0020 },
297 { 0x00000000, 0x02ac007d, 0x02ac007d },
298 { 0x00000000, 0x02ac007e, 0x02ac007e },
299 { 0x00000000, 0x02ac007f, 0x02ac007f },
300 { 0x00000000, 0x02ac7ffd, 0x02ac7ffd },
301 { 0x00000000, 0x02ac7ffe, 0x02ac7ffe },
302 { 0x00000000, 0x02ac7fff, 0x02ac7fff }
[all...] |
| simulator-cond-rd-rn-operand-const-a32-orrs.h | 293 { 0x00000000, 0x02ac0000, 0x02ac0000 },
294 { 0x00000000, 0x02ac0001, 0x02ac0001 },
295 { 0x00000000, 0x02ac0002, 0x02ac0002 },
296 { 0x00000000, 0x02ac0020, 0x02ac0020 },
297 { 0x00000000, 0x02ac007d, 0x02ac007d },
298 { 0x00000000, 0x02ac007e, 0x02ac007e },
299 { 0x00000000, 0x02ac007f, 0x02ac007f },
300 { 0x00000000, 0x02ac7ffd, 0x02ac7ffd },
301 { 0x00000000, 0x02ac7ffe, 0x02ac7ffe },
302 { 0x00000000, 0x02ac7fff, 0x02ac7fff }
[all...] |
| simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32-rsbs.h | 293 { 0x00000000, 0x7fffc07e, 0x7fffc07e, 0xffff8002 },
298 { 0x00000000, 0x0000401f, 0x0000401f, 0x00007fff },
300 { 0x00000000, 0x40007ffe, 0x40007ffe, 0x80000001 },
304 { 0x00000000, 0x199a1998, 0x199a1998, 0x33333333 },
305 { 0x00000000, 0x000000bf, 0x000000bf, 0x0000007e },
310 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x00000000 },
323 { 0x00000000, 0x0000007f, 0x0000007f, 0x00000002 },
326 { 0x00000000, 0x7fffc002, 0x7fffc002, 0xffff8001 },
328 { 0x00000000, 0x0000401f, 0x0000401f, 0x00007ffe },
330 { 0x00000000, 0x000000bc, 0x000000bc, 0x0000007d }
[all...] |
| simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32-rsbs.h | 293 { 0x00000000, 0x7fffc07e, 0x7fffc07e, 0xffff8002 },
298 { 0x00000000, 0x0000401f, 0x0000401f, 0x00007fff },
300 { 0x00000000, 0x40007ffe, 0x40007ffe, 0x80000001 },
304 { 0x00000000, 0x199a1998, 0x199a1998, 0x33333333 },
305 { 0x00000000, 0x000000bf, 0x000000bf, 0x0000007e },
310 { 0x80000000, 0xfffffffe, 0xfffffffe, 0x00000000 },
323 { 0x00000000, 0x0000007f, 0x0000007f, 0x00000002 },
326 { 0x00000000, 0x7fffc002, 0x7fffc002, 0xffff8001 },
328 { 0x00000000, 0x0000401f, 0x0000401f, 0x00007ffe },
330 { 0x00000000, 0x000000bc, 0x000000bc, 0x0000007d }
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to32-a32-teq.h | 293 { 0x40000000, 0x00000000, 0x00000000 },
295 { 0x00000000, 0x00000002, 0x00000002 },
296 { 0x00000000, 0x00000020, 0x00000020 },
298 { 0x00000000, 0x0000007e, 0x0000007e },
301 { 0x00000000, 0x00007ffe, 0x00007ffe },
306 { 0x00000000, 0x7ffffffe, 0x7ffffffe },
326 { 0x40000000, 0x00000000, 0x00000000 },
328 { 0x00000000, 0x00000002, 0x00000002 }
[all...] |
| simulator-cond-rd-operand-rn-a32-teq.h | 293 { 0x40000000, 0x00000000, 0x00000000 },
326 { 0x40000000, 0x00000000, 0x00000000 },
359 { 0x40000000, 0x00000000, 0x00000000 },
392 { 0x40000000, 0x00000000, 0x00000000 },
425 { 0x40000000, 0x00000000, 0x00000000 },
[all...] |
| simulator-cond-rd-operand-rn-t32-teq.h | 293 { 0x40000000, 0x00000000, 0x00000000 },
326 { 0x40000000, 0x00000000, 0x00000000 },
359 { 0x40000000, 0x00000000, 0x00000000 },
392 { 0x40000000, 0x00000000, 0x00000000 },
425 { 0x40000000, 0x00000000, 0x00000000 },
[all...] |
| simulator-cond-rd-rn-operand-const-a32-rsbs.h | 39 { 0x00000000, 0x54545500, 0x54545500 },
42 { 0x00000000, 0x54545500, 0x54545500 },
45 { 0x00000000, 0x54545500, 0x54545500 },
46 { 0x00000000, 0x54545500, 0x54545500 },
48 { 0x00000000, 0x54545500, 0x54545500 },
49 { 0x00000000, 0x54545500, 0x54545500 },
51 { 0x00000000, 0x54545500, 0x54545500 },
52 { 0x00000000, 0x54545500, 0x54545500 },
55 { 0x00000000, 0x54545500, 0x54545500 },
57 { 0x00000000, 0x54545500, 0x54545500 }
[all...] |
| simulator-cond-rd-rn-operand-const-a32-rscs.h | 39 { 0x00000000, 0x545454ff, 0x545454ff },
42 { 0x00000000, 0x545454ff, 0x545454ff },
45 { 0x00000000, 0x54545500, 0x54545500 },
46 { 0x00000000, 0x545454ff, 0x545454ff },
48 { 0x00000000, 0x54545500, 0x54545500 },
49 { 0x00000000, 0x545454ff, 0x545454ff },
51 { 0x00000000, 0x54545500, 0x54545500 },
52 { 0x00000000, 0x54545500, 0x54545500 },
55 { 0x00000000, 0x545454ff, 0x545454ff },
57 { 0x00000000, 0x54545500, 0x54545500 }
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to31-t32-tst.h | 293 { 0x40000000, 0x00000000, 0x00000000 },
297 { 0x00000000, 0x0000007d, 0x0000007d },
298 { 0x00000000, 0x0000007e, 0x0000007e },
299 { 0x00000000, 0x0000007f, 0x0000007f },
300 { 0x00000000, 0x00007ffd, 0x00007ffd },
301 { 0x00000000, 0x00007ffe, 0x00007ffe },
302 { 0x00000000, 0x00007fff, 0x00007fff },
303 { 0x00000000, 0x33333333, 0x33333333 },
305 { 0x00000000, 0x7ffffffd, 0x7ffffffd }
[all...] |
| /hardware/qcom/msm8960/original-kernel-headers/linux/mfd/wcd9xxx/ |
| wcd9304_registers.h | 17 #define SITAR_A_PIN_CTL_OE0__POR (0x00000000)
19 #define SITAR_A_PIN_CTL_OE1__POR (0x00000000)
21 #define SITAR_A_PIN_CTL_DATA0__POR (0x00000000)
23 #define SITAR_A_PIN_CTL_DATA1__POR (0x00000000)
25 #define SITAR_A_HDRIVE_GENERIC__POR (0x00000000)
33 #define SITAR_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
35 #define SITAR_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
39 #define SITAR_A_QFUSE_CTL__POR (0x00000000)
41 #define SITAR_A_QFUSE_STATUS__POR (0x00000000)
43 #define SITAR_A_QFUSE_DATA_OUT0__POR (0x00000000)
[all...] |
| /hardware/intel/img/psb_video/fw/topazsc/ |
| JPEGMasterFirmware_bin.c | 1562 0x00000000,
1563 0x00000000,
1564 0x00000000,
1565 0x00000000,
1566 0x00000000,
1567 0x00000000,
1568 0x00000000,
1569 0x00000000,
1570 0x00000000,
1571 0x00000000,
[all...] |
| H263MasterFirmware_bin.c | [all...] |
| H263SlaveFirmware_bin.c | [all...] |
| MPG4MasterFirmwareCBR_bin.c | [all...] |
| /external/vixl/test/aarch64/traces/ |
| sim-fcmeq-s-2opimm-trace-aarch64.h | 38 0x00000000,
39 0x00000000,
40 0x00000000,
42 0x00000000,
43 0x00000000,
44 0x00000000,
45 0x00000000,
46 0x00000000,
47 0x00000000,
48 0x00000000,
[all...] |
| sim-cmgt-2s-2opimm-trace-aarch64.h | 38 0x00000000, 0x00000000,
39 0x00000000, 0x00000000,
40 0x00000000, 0x00000000,
41 0x00000000, 0xffffffff,
55 0xffffffff, 0x00000000,
56 0x00000000, 0x00000000,
[all...] |
| sim-usqadd-2s-trace-aarch64.h | 38 0x00000000, 0x00000000,
39 0x00000000, 0x00000000,
40 0x00000000, 0x00000000,
41 0x00000000, 0x00000001,
55 0x7fffffff, 0x00000000,
56 0x00000000, 0x00000000,
[all...] |
| sim-sqshrn-h-2opimm-trace-aarch64.h | 86 0x00000000,
87 0x00000000,
88 0x00000000,
89 0x00000000,
90 0x00000000,
91 0x00000000,
92 0x00000000,
93 0x00000000,
94 0x00000000,
95 0x00000000,
[all...] |
| sim-uqshrn-h-2opimm-trace-aarch64.h | 86 0x00000000,
87 0x00000000,
88 0x00000000,
89 0x00000000,
90 0x00000000,
91 0x00000000,
92 0x00000000,
93 0x00000000,
94 0x00000000,
95 0x00000000,
[all...] |
| /external/valgrind/none/tests/ppc32/ |
| test_isa_2_06_part2-div.stdout.exp | 2 #0: divweu: 0x00000000 / 0x00000002 = 0x00000000; CR=0; XER=0
3 #1: divweu: 0x00000002 / 0x00000000 = 0x00000000; CR=0; XER=0
5 #3: divweu: 0xfabc1234 / 0x00000005 = 0x00000000; CR=0; XER=0
6 #4: divweu: 0x0000004d / 0x00000042 = 0x00000000; CR=0; XER=0
9 #0: divweu.: 0x00000000 / 0x00000002 = 0x00000000; CR=2; XER=0
10 #1: divweu.: 0x00000002 / 0x00000000 = 0x00000000; CR=2; XER=
[all...] |
| test_isa_2_06_part3-div.stdout.exp | 2 #0: divwe: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=0; XER=0
3 #1: divwe: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=0; XER=0
4 #2: divwe: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=0; XER=0
5 #3: divwe: 0xfabc123400000000 / 0x00000005 = 0x00000000; CR=0; XER=0
6 #4: divwe: 0x0000004d00000000 / 0x00000042 = 0x00000000; CR=0; XER=0
9 #0: divwe.: 0x0000000000000000 / 0x00000002 = 0x00000000; CR=2; XER=0
10 #1: divwe.: 0x0000000200000000 / 0x00000000 = 0x00000000; CR=2; XER=0
11 #2: divwe.: 0x7abc123400000000 / 0xf0000000 = 0x00000000; CR=2; XER=
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| radeon_vce_40_2_2.c | 71 RVCE_CS(0x00000000); // collocateFlagDependency
87 enc->task_info(enc, 0x00000000, 0, 0, 0);
90 RVCE_CS(0x00000000); // encUseCircularBuffer
94 RVCE_CS(0x00000000); // encPicStructRestriction
100 RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
111 RVCE_CS(0x00000000); // encGOPSize
117 RVCE_CS(0x00000000); // encVBVBufferLevel
118 RVCE_CS(0x00000000); // encMaxAUSize
119 RVCE_CS(0x00000000); // encQPInitialMode
123 RVCE_CS(0x00000000); // encMinQ
[all...] |
