| /external/libavc/encoder/ |
| iv2.h | 60 IV_STATUS_NA = 0x7FFFFFFF,
68 IV_NA_MEM_TYPE = 0x7FFFFFFF,
82 IV_CHROMA_NA = 0x7FFFFFFF,
103 IV_NA_FRAME = 0x7FFFFFFF,
127 IV_NA_FLD = 0x7FFFFFFF,
135 IV_CONTENTTYPE_NA = 0x7FFFFFFF,
148 IV_PROFILE_NA = 0x7FFFFFFF,
163 ARCH_NA = 0x7FFFFFFF,
183 SOC_NA = 0x7FFFFFFF,
191 IV_CMD_NA = 0x7FFFFFFF,
[all...] |
| /external/vixl/test/aarch64/traces/ |
| sim-uhadd-2s-trace-aarch64.h | 100 0x803ffe7e, 0x7fffffff, 0x00000000, 0x00000000,
101 0x803ffe7f, 0x7fffffff, 0x00000000, 0x00000000,
131 0x7ffffffe, 0x7fffffff, 0x00000000, 0x00000000,
132 0x7fffffff, 0x80000000, 0x00000000, 0x00000000,
133 0x7fffffff, 0x00000000, 0x00000000, 0x00000000,
161 0x7ffffff0, 0x7fffffff, 0x00000000, 0x00000000,
162 0x7fffffff, 0x80000000, 0x00000000, 0x00000000,
163 0x7fffffff, 0x80000000, 0x00000000, 0x00000000,
192 0x7ffffff0, 0x7fffffff, 0x00000000, 0x00000000,
193 0x7fffffff, 0x8000000f, 0x00000000, 0x00000000
[all...] |
| /external/vixl/test/aarch32/traces/ |
| simulator-cond-rd-operand-rn-a32-mvn.h | 308 { 0x00000000, 0x7fffffff, 0x7fffffff },
341 { 0x00000000, 0x7fffffff, 0x7fffffff },
374 { 0x00000000, 0x7fffffff, 0x7fffffff },
407 { 0x00000000, 0x7fffffff, 0x7fffffff },
440 { 0x00000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-a32-mvns.h | 308 { 0x00000000, 0x7fffffff, 0x7fffffff },
341 { 0x00000000, 0x7fffffff, 0x7fffffff },
374 { 0x00000000, 0x7fffffff, 0x7fffffff },
407 { 0x00000000, 0x7fffffff, 0x7fffffff },
440 { 0x00000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-t32-mvn.h | 308 { 0x00000000, 0x7fffffff, 0x7fffffff },
341 { 0x00000000, 0x7fffffff, 0x7fffffff },
374 { 0x00000000, 0x7fffffff, 0x7fffffff },
407 { 0x00000000, 0x7fffffff, 0x7fffffff },
440 { 0x00000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-t32-mvns.h | 308 { 0x00000000, 0x7fffffff, 0x7fffffff },
341 { 0x00000000, 0x7fffffff, 0x7fffffff },
374 { 0x00000000, 0x7fffffff, 0x7fffffff },
407 { 0x00000000, 0x7fffffff, 0x7fffffff },
440 { 0x00000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to32-t32-cmn.h | 307 { 0x90000000, 0x7fffffff, 0x7fffffff },
340 { 0x90000000, 0x7fffffff, 0x7fffffff },
373 { 0x90000000, 0x7fffffff, 0x7fffffff },
406 { 0x90000000, 0x7fffffff, 0x7fffffff },
439 { 0x90000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to32-t32-cmp.h | 307 { 0x20000000, 0x7fffffff, 0x7fffffff },
340 { 0x20000000, 0x7fffffff, 0x7fffffff },
373 { 0x20000000, 0x7fffffff, 0x7fffffff },
406 { 0x20000000, 0x7fffffff, 0x7fffffff },
439 { 0x20000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to32-t32-teq.h | 307 { 0x20000000, 0x7fffffff, 0x7fffffff },
340 { 0x20000000, 0x7fffffff, 0x7fffffff },
373 { 0x20000000, 0x7fffffff, 0x7fffffff },
406 { 0x20000000, 0x7fffffff, 0x7fffffff },
439 { 0x20000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to32-t32-tst.h | 307 { 0x20000000, 0x7fffffff, 0x7fffffff },
340 { 0x20000000, 0x7fffffff, 0x7fffffff },
373 { 0x20000000, 0x7fffffff, 0x7fffffff },
406 { 0x20000000, 0x7fffffff, 0x7fffffff },
439 { 0x20000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to31-t32-cmn.h | 307 { 0x20000000, 0x7fffffff, 0x7fffffff },
340 { 0x20000000, 0x7fffffff, 0x7fffffff },
373 { 0x20000000, 0x7fffffff, 0x7fffffff },
406 { 0x20000000, 0x7fffffff, 0x7fffffff },
439 { 0x20000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to31-t32-cmp.h | 307 { 0x90000000, 0x7fffffff, 0x7fffffff },
340 { 0x90000000, 0x7fffffff, 0x7fffffff },
373 { 0x90000000, 0x7fffffff, 0x7fffffff },
406 { 0x90000000, 0x7fffffff, 0x7fffffff },
439 { 0x90000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to31-t32-teq.h | 307 { 0x80000000, 0x7fffffff, 0x7fffffff },
340 { 0x80000000, 0x7fffffff, 0x7fffffff },
373 { 0x80000000, 0x7fffffff, 0x7fffffff },
406 { 0x80000000, 0x7fffffff, 0x7fffffff },
439 { 0x80000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-operand-rn-shift-amount-1to31-t32-tst.h | 307 { 0x00000000, 0x7fffffff, 0x7fffffff },
340 { 0x00000000, 0x7fffffff, 0x7fffffff },
373 { 0x00000000, 0x7fffffff, 0x7fffffff },
406 { 0x00000000, 0x7fffffff, 0x7fffffff },
439 { 0x00000000, 0x7fffffff, 0x7fffffff },
[all...] |
| simulator-cond-rd-rn-operand-rm-t32-rsb.h | 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
356 { 0xd0000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
364 { 0x10000000, 0x7fffffff, 0x7fffffff, 0x00000000 },
367 { 0x50000000, 0x7fffffff, 0x7fffffff, 0xfffffffd },
411 { 0xc0000000, 0x2aaaaaaa, 0x2aaaaaaa, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0x80000001, 0x80000001, 0x7fffffff },
[all...] |
| simulator-cond-rd-rn-operand-rm-t32-rsbs.h | 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
356 { 0x30000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
364 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000000 },
367 { 0x30000000, 0x7fffffff, 0x7fffffff, 0xfffffffd },
411 { 0x20000000, 0x2aaaaaaa, 0x2aaaaaaa, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0x90000000, 0x80000001, 0x80000001, 0x7fffffff },
[all...] |
| simulator-cond-rd-rn-operand-rm-t32-ror.h | 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
332 { 0x40000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
411 { 0xc0000000, 0xaaaaaaaa, 0xaaaaaaaa, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0xfffffffd, 0xfffffffd, 0x7fffffff },
431 { 0xe0000000, 0x0000fffe, 0x0000fffe, 0x7fffffff },
464 { 0xc0000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 }
[all...] |
| simulator-cond-rd-rn-operand-rm-t32-rors.h | 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
332 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
411 { 0xa0000000, 0xaaaaaaaa, 0xaaaaaaaa, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xa0000000, 0xfffffffd, 0xfffffffd, 0x7fffffff },
431 { 0x00000000, 0x0000fffe, 0x0000fffe, 0x7fffffff },
464 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000002 },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 }
[all...] |
| simulator-cond-rd-rn-operand-rm-a32-ror.h | 294 { 0x00000000, 0x000000fc, 0x000000fc, 0x7fffffff },
314 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffffff80 },
318 { 0x00000000, 0x0000fffc, 0x0000fffc, 0x7fffffff },
326 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffff8001 },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0x00000000, 0xffff0005, 0xffff0005, 0x7fffffff },
357 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffffffe0 }
[all...] |
| simulator-cond-rd-rn-operand-rm-a32-rors.h | 294 { 0x00000000, 0x000000fc, 0x000000fc, 0x7fffffff },
314 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffffff80 },
318 { 0x00000000, 0x0000fffc, 0x0000fffc, 0x7fffffff },
326 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffff8001 },
327 { 0x00000000, 0x7fffffff, 0x7fffffff, 0x00000020 },
334 { 0xa0000000, 0xffff0005, 0xffff0005, 0x7fffffff },
357 { 0x00000000, 0x7fffffff, 0x7fffffff, 0xffffffe0 }
[all...] |
| simulator-cond-rd-rn-operand-rm-t32-sxtab.h | 319 { 0xa0000000, 0xffffff80, 0xffffff80, 0x7fffffff },
378 { 0x10000000, 0x7fffffff, 0x7fffffff, 0x80000001 },
411 { 0xc0000000, 0x55555554, 0x55555554, 0x7fffffff },
417 { 0xa0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
422 { 0xc0000000, 0xfffffffd, 0xfffffffd, 0x7fffffff },
431 { 0xe0000000, 0x00007ffe, 0x00007ffe, 0x7fffffff },
484 { 0xa0000000, 0x7fffffff, 0x7fffffff, 0x00000001 },
521 { 0xa0000000, 0xffffff7f, 0xffffff7f, 0x7fffffff },
[all...] |
| /external/valgrind/none/tests/mips32/ |
| MIPS32int.stdout.exp-mips32r2-BE | 13 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
51 addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
52 addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0x7fffffff
53 addu $t0, $t1, $t2 :: rd 0xfffffffe rs 0x7fffffff, rt 0x7fffffff
63 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x00000000
65 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
67 and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd00000
78 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
80 and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd0000
[all...] |
| MIPS32int.stdout.exp-mips32r2-LE | 13 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
51 addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
52 addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0x7fffffff
53 addu $t0, $t1, $t2 :: rd 0xfffffffe rs 0x7fffffff, rt 0x7fffffff
63 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x00000000
65 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
67 and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd00000
78 and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
80 and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd0000
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| d3d9types.h | 453 D3DSIO_FORCE_DWORD = 0X7FFFFFFF /** for 32-bit alignment */
483 D3DSTT_FORCE_DWORD = 0x7FFFFFFF
504 D3DSPDM_FORCE_DWORD = 0x7FFFFFFF
541 D3DSPR_FORCE_DWORD = 0x7FFFFFFF
554 D3DSRO_FORCE_DWORD = 0x7FFFFFFF
564 D3DVS_ADDRMODE_FORCE_DWORD = 0x7FFFFFFF
574 D3DSHADER_ADDRMODE_FORCE_DWORD = 0x7FFFFFFF
628 D3DSPSM_FORCE_DWORD = 0x7FFFFFFF
654 D3DBACKBUFFER_TYPE_FORCE_DWORD = 0x7fffffff
662 D3DBASIS_FORCE_DWORD = 0x7fffffff
[all...] |
| /external/vixl/test/aarch32/ |
| test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 184 {NoFlag, 0x0000007e, 0x7fffffff, 0x0000007e},
185 {NoFlag, 0xffffffff, 0x7fffffff, 0xffffffff},
224 {NoFlag, 0x80000001, 0x7fffffff, 0x80000001},
229 {NoFlag, 0x7fffffff, 0x7fffffff, 0x7fffffff},
248 {NoFlag, 0xfffffffe, 0x7fffffff, 0xfffffffe},
259 {NoFlag, 0x7fffffff, 0xaaaaaaaa, 0x7fffffff},
260 {NoFlag, 0x7fffffff, 0xfffffffd, 0x7fffffff}
[all...] |
