HomeSort by relevance Sort by last modified time
    Searched full:xmm15 (Results 26 - 50 of 196) sorted by null

12 3 4 5 6 7 8

  /external/swiftshader/third_party/LLVM/test/TableGen/
Slice.td 56 def XMM15: Register<"xmm15">;
61 XMM12, XMM13, XMM14, XMM15]>;
TargetInstrSpec.td 57 def XMM15: Register<"xmm15">;
62 XMM12, XMM13, XMM14, XMM15]>;
cast.td 56 def XMM15: Register<"xmm15">;
61 XMM12, XMM13, XMM14, XMM15]>;
MultiPat.td 65 def XMM15: Register<"xmm15">;
70 XMM12, XMM13, XMM14, XMM15]>;
  /external/llvm/test/CodeGen/X86/
stack-folding-int-avx2.ll 14 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
25 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
36 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
50 %3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
57 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
67 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
76 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
85 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
94 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
103 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"(
    [all...]
stack-folding-xop.ll 14 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
23 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
32 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
41 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
50 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
59 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
68 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
75 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
84 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
91 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"(
    [all...]
preserve_allcc64.ll 21 ;SSE: movaps %xmm15
68 call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rbp},~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()
100 %a23 = call <2 x double> asm sideeffect "", "={xmm15}"() nounwind
102 call void asm sideeffect "", "{rax},{rcx},{rdx},{r8},{r9},{r10},{r11},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},{xmm8},{xmm9},{xmm10},{xmm11},{xmm12},{xmm13},{xmm14},{xmm15}"(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, <2 x double> %a10, <2 x double> %a11, <2 x double> %a12, <2 x double> %a13, <2 x double> %a14, <2 x double> %a15, <2 x double> %a16, <2 x double> %a17, <2 x double> %a18, <2 x double> %a19, <2 x double> %a20, <2 x double> %a21, <2 x double> %a22, <2 x double> %a23)
preserve_mostcc64.ll 37 call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rbp},~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()
60 ;SSE: movaps %xmm15
82 %a23 = call <2 x double> asm sideeffect "", "={xmm15}"() nounwind
84 call void asm sideeffect "", "{rax},{rcx},{rdx},{r8},{r9},{r10},{r11},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},{xmm8},{xmm9},{xmm10},{xmm11},{xmm12},{xmm13},{xmm14},{xmm15}"(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, <2 x double> %a10, <2 x double> %a11, <2 x double> %a12, <2 x double> %a13, <2 x double> %a14, <2 x double> %a15, <2 x double> %a16, <2 x double> %a17, <2 x double> %a18, <2 x double> %a19, <2 x double> %a20, <2 x double> %a21, <2 x double> %a22, <2 x double> %a23)
win64_nonvol.ll 20 ; CHECK-DAG: movaps %xmm15,
  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Pei/PeiLib/X64/
EfiJump.h 39 UINT8 XmmBuffer[160]; // XMM6-XMM15
  /external/valgrind/none/tests/amd64-solaris/
coredump_single_thread_sse.post.exp 22 %xmm15 0x2a67ef939534a7e1242ddd049b9e3936
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-pe/
cfi.d 15 DW_CFA_offset: r32 \(xmm15\) at cfa\-8
  /external/boringssl/win-x86_64/crypto/fipsmodule/
aesni-x86_64.asm 1145 movaps XMMWORD[(-24)+r11],xmm15
1484 movdqu xmm15,XMMWORD[80+rdi]
1486 pxor xmm15,xmm0
1511 movdqa xmm15,XMMWORD[64+rsp]
1526 movdqa xmm6,xmm15
    [all...]
  /external/boringssl/linux-x86_64/crypto/fipsmodule/
aesni-x86_64.S 1376 movdqu 80(%rdi),%xmm15
1378 pxor %xmm0,%xmm15
1403 movdqa 64(%rsp),%xmm15
1418 movdqa %xmm15,%xmm6
1569 pxor %xmm15,%xmm15
1608 movdqa %xmm2,%xmm15
1613 movdqa %xmm15,%xmm10
1615 paddq %xmm15,%xmm15
    [all...]
  /external/boringssl/mac-x86_64/crypto/fipsmodule/
aesni-x86_64.S 1375 movdqu 80(%rdi),%xmm15
1377 pxor %xmm0,%xmm15
1402 movdqa 64(%rsp),%xmm15
1417 movdqa %xmm15,%xmm6
1568 pxor %xmm15,%xmm15
1607 movdqa %xmm2,%xmm15
1612 movdqa %xmm15,%xmm10
1614 paddq %xmm15,%xmm15
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
x86-64-avx.s     [all...]
x86-64-opcode.s 109 ADDPD (%r8),%xmm15 # -- -- 66 45 0F 58 38 ; REX to access upper XMM reg. REX to access upper reg. OVR 128bit MMinstr.
110 ADDPD (%rax),%xmm15 # -- -- 66 44 0F 58 38 ; REX to access upper XMM reg. OVR 128bit MMinstr.
116 ADDPD %xmm15,%xmm15 # -- -- 66 45 0F 58 FF ; REX to access upper XMM reg. OVR 128bit MMinstr.
117 ADDPD %xmm15,%xmm8 # -- -- 66 45 0F 58 C7 ; REX to access upper XMM reg. OVR 128bit MMinstr.
127 CVTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
128 CVTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2d c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
141 CVTTSD2SIq %xmm15,%r8 # -- -- F2 4D 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg REX to access upper reg.
142 CVTTSD2SIq %xmm15,%rax # -- -- F2 49 0f 2c c7 ; OVR 128-bit media instruction override REX for 64-bit operand size REX to access upper XMM reg
155 CVTSS2SIq %xmm15,%r8 # -- -- F3 4D 0f 2d c7 ; OVR 128-bit media instruction override Res (…)
    [all...]
  /external/llvm/test/TableGen/
MultiPat.td 65 def XMM15: Register<"xmm15">;
70 XMM12, XMM13, XMM14, XMM15]>;
Slice.td 55 def XMM15: Register<"xmm15">;
60 XMM12, XMM13, XMM14, XMM15]>;
TargetInstrSpec.td 62 def XMM15: Register<"xmm15">;
67 XMM12, XMM13, XMM14, XMM15]>;
  /art/runtime/arch/x86_64/
jni_entrypoints_x86_64.S 45 movq %xmm15, 88(%rsp)
62 movq 88(%rsp), %xmm15
registers_x86_64.cc 38 if (rhs >= XMM0 && rhs <= XMM15) {
  /prebuilts/go/darwin-x86/src/runtime/cgo/
asm_amd64.s 14 SUBQ $0x118, SP /* also need to save xmm6 - xmm15 */
24 // Win64 save RBX, RBP, RDI, RSI, RSP, R12, R13, R14, R15 and XMM6 -- XMM15.
  /prebuilts/go/linux-x86/src/runtime/cgo/
asm_amd64.s 14 SUBQ $0x118, SP /* also need to save xmm6 - xmm15 */
24 // Win64 save RBX, RBP, RDI, RSI, RSP, R12, R13, R14, R15 and XMM6 -- XMM15.
  /external/boringssl/win-x86_64/crypto/chacha/
chacha-x86_64.asm 511 movaps XMMWORD[(-24)+r9],xmm15
514 movdqu xmm15,XMMWORD[rcx]
530 pshufd xmm12,xmm15,0x00
531 pshufd xmm13,xmm15,0x55
533 pshufd xmm14,xmm15,0xaa
535 pshufd xmm15,xmm15,0xff
537 movdqa XMMWORD[(176-256)+rcx],xmm15
568 movdqa xmm15,XMMWORD[((176-256))+rcx]
632 paddd xmm11,xmm15
    [all...]

Completed in 968 milliseconds

12 3 4 5 6 7 8