| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| and-xor-merge.ll | 2 ; RUN: opt < %s -instcombine -S | grep xor | count 2
8 %tmp7 = xor i32 %tmp3, %tmp6
16 %tmp7 = xor i32 %tmp3, %tmp6
|
| xor2.ll | 9 %B = xor i32 %A, -2147483648
17 %B = xor i32 %A, 12345
30 %ov110 = xor i32 %ov3, 153
41 %ov110 = xor i32 %ov31, 153
46 %1 = xor i32 %A, -1
48 %3 = xor i32 %2, -1
|
| apint-add2.ll | 10 %tmp.4 = xor i111 %x, %tmp.2
11 ;; Add of sign bit -> xor of sign bit.
18 %tmp.2 = xor i65 %x, %tmp.0
19 ;; Add of sign bit -> xor of sign bit.
26 %tmp.2 = xor i1024 %x, %tmp.0
27 ;; Add of sign bit -> xor of sign bit.
33 ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
36 %tmp.2 = xor i128 %x, %tmp.1
|
| /external/valgrind/exp-bbv/tests/amd64-linux/ |
| million.S | 7 xor %rcx,%rcx # not needed, pads total to 1M
8 xor %rax,%rax # not needed, pads total to 1M
19 xor %rdi,%rdi # we return 0
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| xor.ll | 36 ; GP32: xor $2, $4, $5
38 ; GP64: xor $2, $4, $5
43 %r = xor i1 %a, %b
51 ; GP32: xor $2, $4, $5
53 ; GP64: xor $2, $4, $5
58 %r = xor i8 %a, %b
66 ; GP32: xor $2, $4, $5
68 ; GP64: xor $2, $4, $5
73 %r = xor i16 %a, %b
81 ; GP32: xor $2, $4, $
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| branch-05.ll | 20 i32 5, label %b.xor
40 b.xor:
41 %xor = xor i32 %x, %y
54 [ %xor, %b.xor ],
|
| and-xor-01.ll | 1 ; Testing peephole for generating shorter code for (and (xor b, -1), a)
10 %neg = xor i64 %b, -1
|
| atomicrmw-xor-06.ll | 5 ; Check XOR of a variable.
10 %res = atomicrmw xor i64 *%src, i64 %b seq_cst
14 ; Check XOR of 1, which needs a temporary.
20 %res = atomicrmw xor i64 *%src, i64 1 seq_cst
30 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
41 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
51 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
62 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-mvn2.ll | 6 %tmp = xor i32 4294967295, %a
13 %tmp = xor i32 %a, 4294967295
21 %tmp1 = xor i32 %tmp, 4294967295
29 %tmp1 = xor i32 %tmp, 4294967295
37 %tmp1 = xor i32 %tmp, 4294967295
47 %tmp1 = xor i32 %tmp, 4294967295
|
| thumb2-teq.ll | 8 %tmp = xor i32 %a, 187
17 %tmp = xor i32 %a, 11141290
26 %tmp = xor i32 %a, 3422604288
35 %tmp = xor i32 %a, 3722304989
44 %tmp = xor i32 %a, 3722304989
51 %tmp = xor i32 %a, 1114112
|
| thumb2-orn.ll | 4 %tmp = xor i32 %b, 4294967295
12 %tmp = xor i32 %b, 4294967295
20 %tmp = xor i32 4294967295, %b
28 %tmp = xor i32 4294967295, %b
37 %tmp1 = xor i32 4294967295, %tmp
46 %tmp1 = xor i32 4294967295, %tmp
55 %tmp1 = xor i32 4294967295, %tmp
66 %tmp1 = xor i32 4294967295, %tmp
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-teq.ll | 8 %tmp = xor i32 %a, 187
17 %tmp = xor i32 %a, 11141290
26 %tmp = xor i32 %a, 3422604288
35 %tmp = xor i32 %a, 3722304989
44 %tmp = xor i32 %a, 3722304989
51 %tmp = xor i32 %a, 1114112
|
| thumb2-orn.ll | 5 %tmp = xor i32 %b, 4294967295
13 %tmp = xor i32 %b, 4294967295
21 %tmp = xor i32 4294967295, %b
29 %tmp = xor i32 4294967295, %b
38 %tmp1 = xor i32 4294967295, %tmp
47 %tmp1 = xor i32 4294967295, %tmp
56 %tmp1 = xor i32 4294967295, %tmp
67 %tmp1 = xor i32 4294967295, %tmp
|
| /external/clang/test/SemaObjCXX/ |
| cxxoperator-selector.mm | 8 - xor;
20 - (id) xor{return 0; };
|
| /external/llvm/test/CodeGen/ARM/ |
| bic.ll | 4 %tmp = xor i32 %b, 4294967295
12 %tmp = xor i32 %b, 4294967295
|
| /external/llvm/test/CodeGen/X86/ |
| addr-mode-matcher.ll | 22 %xor = xor i32 0, %tmp1694
24 ; %load1 = (load (and (shl %xor, 2), 1020))
25 %tmp1701 = shl i32 %xor, 2
31 ; %load2 = (load (shl (and %xor, 255), 2))
32 %tmp1698 = and i32 %xor, 255
40 ; While matching xor we address-match %load1. The and-of-shift reassocication
44 %tmp1711 = xor i32 %load1, %tmp1710
|
| /external/llvm/test/Transforms/InstCombine/ |
| apint-add2.ll | 10 %tmp.4 = xor i111 %x, %tmp.2
11 ;; Add of sign bit -> xor of sign bit.
18 %tmp.2 = xor i65 %x, %tmp.0
19 ;; Add of sign bit -> xor of sign bit.
26 %tmp.2 = xor i1024 %x, %tmp.0
27 ;; Add of sign bit -> xor of sign bit.
33 ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
36 %tmp.2 = xor i128 %x, %tmp.1
|
| apint-and2.ll | 15 %NotA = xor i477 %A, -1
16 %NotB = xor i477 %B, -1
23 %NotA = xor i129 %A, -1
24 %NotB = xor i129 %B, -1
31 %NotA = xor i65 %A, -1
32 %NotB = xor i65 -1, %B
39 %NotA = xor i66 %A, -1
40 %NotB = xor i66 %B, -1
64 %C = xor i117 %B, 12
72 %t0 = xor i117 %A, -
[all...] |
| xor.ll | 11 %B = xor i1 %A, false
19 %B = xor i32 %A, 0
27 %B = xor i1 %A, %A
35 %B = xor i32 %A, %A
43 %NotA = xor i32 -1, %A
44 %B = xor i32 %A, %NotA
54 %r = xor i32 %t1, 123
62 %B = xor i8 %A, 17
63 %C = xor i8 %B, 17
76 %C1 = xor i32 %A1, %B
[all...] |
| /external/lzma/Asm/x86/ |
| 7zCrcOpt.asm | 28 CRC xor, dest, src, t
39 xor x6, x3
41 CRC xor, x0, r6, 0
66 xor x0, [SRCDAT 0]
70 xor x0, [SRCDAT 0]
109 xor x0, x6
126 xor x1, [SRCDAT 1]
137 xor x0, [SRCDAT 2]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| bic.ll | 4 %tmp = xor i32 %b, 4294967295
12 %tmp = xor i32 %b, 4294967295
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/ |
| logic-i16.ll | 13 define i16 @xor(i16 %A, i16 %B) {
14 %R = xor i16 %A, %B ; <i16> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| promote-i16.ll | 9 %0 = xor i16 %x, 21998
19 %0 = xor i16 %x, 54766
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-a-err.s | 17 xor r8 = 129, r9
18 xor r3 = -129, r4
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/ |
| to-16bit-v3.s | 12 xor $r0, $r0, $r0 label
13 xor $r7, $r7, $r7 label
|
