| /external/boringssl/src/crypto/fipsmodule/aes/asm/ |
| aes-x86_64.pl | 106 xor 3($sbox,$acc0,8),$t0
107 xor 3($sbox,$acc1,8),$t1
113 xor 3($sbox,$acc0,8),$t2
115 xor 3($sbox,$acc2,8),$t3
124 xor 2($sbox,$acc0,8),$t0
125 xor 2($sbox,$acc1,8),$t1
126 xor 2($sbox,$acc2,8),$t2
131 xor 1($sbox,$acc0,8),$t0
132 xor 1($sbox,$acc1,8),$t1
133 xor 2($sbox,$acc2,8),$t
[all...] |
| /external/valgrind/none/tests/arm/ |
| v8memory_a.stdout.exp | 12 00000000 r2 (xor, data intreg #1)
13 00000000 r3 (xor, data intreg #2)
14 94c87dfb r6 (xor, data intreg #3)
15 00000000 r9 (xor, data intreg #4)
16 00000000 r10 (xor, addr intreg #1)
27 00000000 r2 (xor, data intreg #1)
28 00000000 r3 (xor, data intreg #2)
29 00000000 r6 (xor, data intreg #3)
30 bf153f1b r9 (xor, data intreg #4)
31 00000000 r10 (xor, addr intreg #1
[all...] |
| v8memory_t.stdout.exp | 12 00000000 r2 (xor, data intreg #1)
13 00000000 r3 (xor, data intreg #2)
14 94c87dfb r6 (xor, data intreg #3)
15 00000000 r9 (xor, data intreg #4)
16 00000000 r10 (xor, addr intreg #1)
27 00000000 r2 (xor, data intreg #1)
28 00000000 r3 (xor, data intreg #2)
29 00000000 r6 (xor, data intreg #3)
30 bf153f1b r9 (xor, data intreg #4)
31 00000000 r10 (xor, addr intreg #1
[all...] |
| /external/clang/test/CodeGen/ |
| Atomics.c | 43 (void) __sync_fetch_and_xor (&sc, 1); // CHECK: atomicrmw xor i8
44 (void) __sync_fetch_and_xor (&uc, 1); // CHECK: atomicrmw xor i8
45 (void) __sync_fetch_and_xor (&ss, 1); // CHECK: atomicrmw xor i16
46 (void) __sync_fetch_and_xor (&us, 1); // CHECK: atomicrmw xor i16
47 (void) __sync_fetch_and_xor (&si, 1); // CHECK: atomicrmw xor i32
48 (void) __sync_fetch_and_xor (&ui, 1); // CHECK: atomicrmw xor i32
49 (void) __sync_fetch_and_xor (&sll, 1); // CHECK: atomicrmw xor i64
50 (void) __sync_fetch_and_xor (&ull, 1); // CHECK: atomicrmw xor i64
101 sc = __sync_fetch_and_xor (&sc, 11); // CHECK: atomicrmw xor
102 uc = __sync_fetch_and_xor (&uc, 11); // CHECK: atomicrmw xor
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| 2006-10-17-brcc-miscompile.ll | 1 ; RUN: llc < %s -march=ppc32 | grep xor
9 %tmp2 = xor i32 %tmp1, 1 ; <i32> [#uses=1]
|
| xxleqv_xxlnand_xxlorc.ll | 7 %tmp = xor <4 x i32> %x, %y
8 %ret_val = xor <4 x i32> %tmp, < i32 -1, i32 -1, i32 -1, i32 -1>
16 %ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>
23 %tmp = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
31 %tmp = xor <8 x i16> %x, %y
32 %ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
40 %ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
47 %tmp = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-bic.ll | 6 %tmp = xor i32 %b, 4294967295
14 %tmp = xor i32 %b, 4294967295
22 %tmp = xor i32 4294967295, %b
30 %tmp = xor i32 4294967295, %b
39 %tmp1 = xor i32 4294967295, %tmp
48 %tmp1 = xor i32 %tmp, 4294967295
57 %tmp1 = xor i32 %tmp, 4294967295
68 %tmp1 = xor i32 4294967295, %tmp
|
| /external/llvm/test/CodeGen/X86/ |
| long-setcc.ll | 29 ; CHECK: xor
30 ; CHECK-NOT: xor
|
| promote-i16.ll | 10 %0 = xor i16 %x, 21998
21 %0 = xor i16 %x, 54766
|
| ret-addr.ll | 1 ; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor
2 ; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor
|
| 2009-07-09-ExtractBoolFromVector.ll | 5 %1 = xor <4 x i1> zeroinitializer, < i1 true, i1 true, i1 true, i1 true >
|
| /external/llvm/test/Transforms/InstCombine/ |
| and-xor-or.ll | 7 %2 = xor i64 %y, %x
18 %2 = xor i64 %y, %x
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| 2006-10-17-brcc-miscompile.ll | 1 ; RUN: llc < %s -march=ppc32 | grep xor
9 %tmp2 = xor i32 %tmp1, 1 ; <i32> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-bic.ll | 6 %tmp = xor i32 %b, 4294967295
14 %tmp = xor i32 %b, 4294967295
22 %tmp = xor i32 4294967295, %b
30 %tmp = xor i32 4294967295, %b
39 %tmp1 = xor i32 4294967295, %tmp
48 %tmp1 = xor i32 %tmp, 4294967295
57 %tmp1 = xor i32 %tmp, 4294967295
68 %tmp1 = xor i32 4294967295, %tmp
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| avx-select.ll | 9 %res = xor <8 x i32> %b, %selres
19 %res = xor <4 x i64> %b, %selres
|
| ret-addr.ll | 1 ; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor
2 ; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor
|
| vec_shuffle-17.ll | 3 ; CHECK-NOT: xor
5 ; CHECK-NOT: xor
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| and.s | 11 # nor, or, and xor are handled by the same code. There is a special
23 xor $4,$5,0
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sparc/ |
| gotop32.s | 26 xor %l1, %gdop_lox10(sym), %l1
32 xor %l1, %gdop_lox10(local_sym), %l1
|
| gotop64.s | 26 xor %l1, %gdop_lox10(sym), %l1
32 xor %l1, %gdop_lox10(local_sym), %l1
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| arith.ll | 39 ; CHECK-LABEL: 'xor'
40 define i32 @xor(i32 %arg) {
41 ; SSSE3: cost of 1 {{.*}} %A = xor
42 ; SSE42: cost of 1 {{.*}} %A = xor
43 ; AVX: cost of 1 {{.*}} %A = xor
44 ; AVX2: cost of 1 {{.*}} %A = xor
45 %A = xor <4 x i32> undef, undef
46 ; SSSE3: cost of 2 {{.*}} %B = xor
47 ; SSE42: cost of 2 {{.*}} %B = xor
48 ; AVX: cost of 1 {{.*}} %B = xor
[all...] |
| /external/llvm/test/CodeGen/MSP430/ |
| Inst16mi.ll | 41 define void @xor() nounwind {
42 ; CHECK-LABEL: xor:
43 ; CHECK: xor.w #2, &foo
45 %2 = xor i16 %1, 2
|
| Inst8mi.ll | 40 define void @xor() nounwind {
41 ; CHECK-LABEL: xor:
42 ; CHECK: xor.b #2, &foo
44 %2 = xor i8 %1, 2
|
| Inst8mm.ll | 46 define void @xor() nounwind {
47 ; CHECK-LABEL: xor:
48 ; CHECK: xor.b &bar, &foo
51 %3 = xor i8 %2, %1
|
| /external/llvm/test/CodeGen/SystemZ/ |
| atomicrmw-xor-03.ll | 15 %res = atomicrmw xor i32 *%src, i32 %b seq_cst
29 %res = atomicrmw xor i32 *%src, i32 1 seq_cst
38 %res = atomicrmw xor i32 *%src, i32 3000000000 seq_cst
47 %res = atomicrmw xor i32 *%src, i32 -1 seq_cst
|
