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  /external/llvm/test/MC/ARM/
neon-vld-encoding.s 12 vld1.16 {d4, d5, d6}, [r3:64]
13 vld1.32 {d5, d6, d7}, [r3]
14 vld1.64 {d6, d7, d8}, [r3:64]
16 vld1.16 {d4, d5, d6, d7}, [r3:64]
17 vld1.32 {d5, d6, d7, d8}, [r3]
18 vld1.64 {d6, d7, d8, d9}, [r3:64]
39 vld1.16 {d4, d5, d6}, [r3:64]!
40 vld1.32 {d5, d6, d7}, [r3]!
41 vld1.64 {d6, d7, d8}, [r3:64]!
44 vld1.16 {d4, d5, d6}, [r3:64], r
    [all...]
eh-directive-vsave.s 50 .vsave {d0, d1, d2, d3, d4, d5, d6, d7}
51 vpush {d0, d1, d2, d3, d4, d5, d6, d7}
52 vpop {d0, d1, d2, d3, d4, d5, d6, d7}
63 .vsave {d2, d3, d4, d5, d6, d7}
64 vpush {d2, d3, d4, d5, d6, d7}
65 vpop {d2, d3, d4, d5, d6, d7}
single-precision-fp.s 7 vdiv.f64 d4, d5, d6
8 vmul.f64 d6, d7, d8
15 @ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6
17 @ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d8
22 vmls.f64 d8, d7, d6
26 vfms.f64 d4, d5, d6
32 @ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d6
40 @ CHECK-ERRORS-NEXT: vfms.f64 d4, d5, d6
60 vcmp.f64 d6, #0
70 @ CHECK-ERRORS-NEXT: vcmp.f64 d6, #
    [all...]
  /external/clang/test/CXX/special/class.inhctor/
p7.cpp 38 struct D6 : B5 {
40 template<typename T> D6(T);
42 D6 d6(0);
  /external/libhevc/common/arm/
ihevc_inter_pred_chroma_vert_w16out.s 182 vld1.32 {d6[0]},[r0] @vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp1, 0
185 vld1.32 {d6[1]},[r6],r2 @loads pu1_src_tmp
186 vdup.32 d7,d6[1]
191 vmlsl.u8 q2,d6,d0
231 vld1.8 {d6},[r6],r2 @load and increment
236 vmlal.u8 q15,d6,d2
240 vmull.u8 q14,d6,d1 @mul_res 2
251 vmlsl.u8 q13,d6,d0
262 vld1.8 {d6},[r6],r2 @load and increment
279 vmlal.u8 q15,d6,d
    [all...]
ihevc_intra_pred_filters_luma_mode_11_to_17.s 287 vmovn.s16 d6, q11
304 vand d6, d6, d29 @fract values in d1/ idx values in d0
313 vsub.s8 d7, d28, d6 @32-fract
321 vmlal.u8 q12, d13, d6 @mul (row 0)
331 vmlal.u8 q11, d17, d6 @mul (row 1)
342 vmlal.u8 q10, d15, d6 @mul (row 2)
353 vmlal.u8 q9, d11, d6 @mul (row 3)
364 vmlal.u8 q12, d13, d6 @mul (row 4)
375 vmlal.u8 q11, d17, d6 @mul (row 5
    [all...]
ihevc_intra_pred_chroma_mode_3_to_9.s 168 vmovn.s16 d6, q11
184 vand d6, d6, d29 @fract values in d1/ idx values in d0
198 vsub.s8 d7, d28, d6 @32-fract
208 vmlal.u8 q12, d13, d6 @mul (row 0)
218 vmlal.u8 q11, d17, d6 @mul (row 1)
229 vmlal.u8 q10, d15, d6 @mul (row 2)
240 vmlal.u8 q9, d11, d6 @mul (row 3)
251 vmlal.u8 q12, d13, d6 @mul (row 4)
264 vmlal.u8 q11, d17, d6 @mul (row 5
    [all...]
ihevc_intra_pred_luma_mode2.s 134 vld1.8 {d6},[r0],r8
152 vrev64.8 d14,d6
192 vld1.8 {d6},[r0],r8
216 vrev64.8 d14,d6
248 vld1.8 {d6},[r10]
258 vrev64.8 d7,d6
ihevc_intra_pred_luma_mode_18_34.s 142 vld1.8 {d6},[r8],r6
169 vst1.8 {d6},[r10],r3
179 vld1.8 {d6},[r8],r6
208 vst1.8 {d6},[r10],r3
218 vld1.8 {d6},[r8],r6
239 vst1.8 {d6},[r10],r3
ihevc_itrans_recon_16x16.s 224 vld1.16 d6,[r0],r10
237 @d6= r1
242 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0)
243 vmull.s16 q13,d6,d0[3] @// y1 * cos3(part of b1)
244 vmull.s16 q14,d6,d1[1] @// y1 * sin3(part of b2)
245 vmull.s16 q15,d6,d1[3] @// y1 * sin1(part of b3)
307 vld1.16 d6,[r0],r10
317 vmlal.s16 q12,d6,d2[1] @// y1 * cos1(part of b0)
318 vmlsl.s16 q13,d6,d1[1] @// y1 * cos3(part of b1)
319 vmlsl.s16 q14,d6,d3[1] @// y1 * sin3(part of b2
    [all...]
ihevc_intra_pred_filters_chroma_mode_11_to_17.s 181 vrev64.16 d6,d6
189 vst1.8 d6,[r6]!
197 vld1.8 {d4,d5,d6},[r1]!
279 vmovn.s16 d6, q11
297 vand d6, d6, d29 @fract values in d1/ idx values in d0
311 vsub.s8 d7, d28, d6 @32-fract
322 vmlal.u8 q12, d13, d6 @mul (row 0)
332 vmlal.u8 q11, d17, d6 @mul (row 1
    [all...]
ihevc_intra_pred_chroma_planar.s 151 vdup.s8 d6, r9 @nt - 1 - row
182 vmlal.u8 q6, d6, d10 @(nt-1-row) * src[2nt+1+col]
192 vmlal.u8 q14,d6,d11
197 vsub.s8 d19, d6, d7 @[nt-1-row]--
217 vsub.s8 d6, d19, d7 @[nt-1-row]--
229 vmlal.u8 q11, d6, d10 @(nt-1-row) * src[2nt+1+col]
238 vmlal.u8 q10,d6,d11
239 vsub.s8 d19, d6, d7 @[nt-1-row]--
264 vsub.s8 d6, d19, d7 @[nt-1-row]--
307 vdup.s8 d6, r9 @nt - 1 - ro
    [all...]
  /frameworks/rs/cpu_ref/
rsCpuIntrinsics_neon_Resize.S 44 * and accumulate them by the coefficients in d6[0..3], leaving the results in
63 vmull.u16 q12, d18, d6[1]
64 vmull.u16 q13, d19, d6[1]
65 vmlsl.u16 q12, d16, d6[0]
66 vmlsl.u16 q13, d17, d6[0]
67 vmlal.u16 q12, d20, d6[2]
68 vmlal.u16 q13, d21, d6[2]
69 vmlsl.u16 q12, d22, d6[3]
70 vmlsl.u16 q13, d23, d6[3]
91 vmull.u16 q12, d18, d6[1
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
rtm-intel.d 19 [ ]*[a-f0-9]+: 0f 01 d6 xtest
rtm.d 18 [ ]*[a-f0-9]+: 0f 01 d6 xtest
x86-64-rtm.d 18 [ ]*[a-f0-9]+: 0f 01 d6 xtest
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/
R4R8First_v7.s 47 VADD.S32 d6, d2, d3 @ r3 = buf[4] + buf[6]@i3 = buf[5] + buf[7]@
57 VADD.S32 d6, d10, d11 @ r2 = buf[12] + buf[14]@i2 = buf[13] + buf[15]@
90 VTRN.32 d6, d7
93 VSUB.S32 d15, d3, d6
95 VADD.S32 d19, d3, d6
137 VADD.S32 d6, d2, d3 @ r6 = buf[4] - buf[6]@ r7 = buf[5] - buf[7]@
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68k/
mcf-mac.d 129 1d6: aeee a0a9 000a macw %a1l,%a2u,%fp@\(10\)&,%sp
    [all...]
mcf-emac.d 262 3d6: aeee a0b9 000a macw %a1l,%a2u,%fp@\(10\)&,%sp,%acc2
    [all...]
mcf-emac.s     [all...]
  /external/boringssl/ios-arm/crypto/fipsmodule/
ghash-armv4.S 372 vld1.64 d6,[r1]
376 vshr.u64 d26,d6,#63
395 vld1.64 d6,[r0]!
428 vld1.64 d6,[r2]!
435 vmull.p8 q8, d16, d6 @ F = A1*B
436 vext.8 d0, d6, d6, #1 @ B1
439 vmull.p8 q9, d18, d6 @ H = A2*B
440 vext.8 d22, d6, d6, #2 @ B
    [all...]
  /external/boringssl/linux-arm/crypto/fipsmodule/
ghash-armv4.S 365 vld1.64 d6,[r1]
369 vshr.u64 d26,d6,#63
386 vld1.64 d6,[r0]!
417 vld1.64 d6,[r2]!
424 vmull.p8 q8, d16, d6 @ F = A1*B
425 vext.8 d0, d6, d6, #1 @ B1
428 vmull.p8 q9, d18, d6 @ H = A2*B
429 vext.8 d22, d6, d6, #2 @ B
    [all...]
  /external/libavc/encoder/arm/
ime_distortion_metrics_a9q.s 99 vld1.8 {d6, d7}, [r1], r3
102 vabdl.u8 q0, d6, d4
111 vld1.8 {d6, d7}, [r1], r3
114 vabal.u8 q0, d6, d4
181 vld1.8 {d6, d7}, [r1], r3
185 vabdl.u8 q0, d6, d4
194 vld1.8 {d6, d7}, [r1], r3
197 vabal.u8 q0, d6, d4
264 vld1.8 {d6, d7}, [r1], r3
269 vabdl.u8 q0, d6, d
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
psn.d 25 50: 09 f0 43 15 64 19 \[MMI\] lfetch.count.d6 \[r10\],63,-1024
50 d6: 00 00 00 02 00 00 nop.m 0x0
58 100: 0b 00 02 20 74 19 \[MMI\] lfetch.fault.d6 \[r16\];;
92 1b6: 00 ec 06 09 23 00 st1.d6 \[r65\]=r93
98 1d6: 00 e8 06 15 23 00 st2.d1 \[r65\]=r93
109 210: 08 00 76 83 8c 11 \[MMI\] st2.d6 \[r65\]=r93
125 266: 00 ec 06 29 23 00 st4.d6 \[r65\]=r93
142 2c0: 08 00 76 83 9c 11 \[MMI\] st8.d6 \[r65\]=r93
146 2d6: 00 e8 06 03 23 00 st16 \[r65\]=r93,ar.csd
160 320: 08 00 76 83 85 11 \[MMI\] st16.d6 \[r65\]=r93,ar.cs
    [all...]
  /external/libavc/common/arm/
ih264_inter_pred_filters_luma_vert_a9q.s 126 vaddl.u8 q6, d4, d6 @ temp1 = src[2_0] + src[3_0]
137 vaddl.u8 q6, d6, d8
156 vaddl.u8 q10, d6, d0
168 vaddl.u8 q7, d6, d4
188 vaddl.u8 q7, d8, d6 @ temp = src[0_0] + src[5_0]
214 vld1.u32 d6, [r0], r2
216 vaddl.u8 q8, d1, d6
223 vaddl.u8 q5, d3, d6
228 vaddl.u8 q7, d5, d6
264 vld1.u32 d6[0], [r0], r
    [all...]

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