Searched
refs:instructions (Results
501 -
525 of
1941) sorted by null
<<21222324252627282930>>
/external/llvm/lib/Transforms/Scalar/ |
ADCE.cpp | 11 // optimistically assumes that all instructions are dead until proven otherwise, 27 #include "llvm/IR/Instructions.h" 36 STATISTIC(NumRemoved, "Number of instructions removed"); 80 // Collect the set of "root" instructions that are known live. 81 for (Instruction &I : instructions(F)) { 109 // The inverse of the live set is the dead set. These are those instructions 113 for (Instruction &I : instructions(F)) {
|
/external/llvm/test/MC/Sparc/ |
sparc-little-endian.s | 7 ! Ensure instructions are emitted in reversed byte order:
|
/external/mesa3d/src/compiler/glsl/ |
lower_output_reads.cpp | 168 lower_output_reads(unsigned stage, exec_list *instructions) 177 visit_list_elements(&v, instructions);
|
lower_subroutine.cpp | 55 lower_subroutine(exec_list *instructions, struct _mesa_glsl_parse_state *state) 58 visit_list_elements(&v, instructions);
|
opt_constant_folding.cpp | 204 do_constant_folding(exec_list *instructions) 208 visit_list_elements(&constant_folding, instructions);
|
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_cubemap_normalize.cpp | 112 brw_do_cubemap_normalize(exec_list *instructions) 116 visit_list_elements(&v, instructions);
|
/external/valgrind/exp-bbv/tests/amd64-linux/ |
clone_test.S | 1 # count for ~1 million instructions thread 1 2 # count for ~2 million instructions thread 2
|
/external/valgrind/exp-bbv/tests/x86-linux/ |
clone_test.S | 1 # count for ~1 million instructions thread 1 2 # count for ~2 million instructions thread 2
|
/external/walt/arduino/ |
README.md | 3 Refer to [Teensyduino instructions](https://www.pjrc.com/teensy/teensyduino.html)
|
/prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
ppc64.go | 25 // one of the RLD-like instructions that require special handling. 26 // The FMADD-like instructions behave similarly. 47 // one of the CMP instructions that require special handling. 57 // one of the NEG-like instructions that require special handling.
|
s390x.go | 52 // one of the RLD-like instructions that require special handling. 53 // The FMADD-like instructions behave similarly. 70 // one of the CMP instructions that require special handling. 80 // one of the NEG-like instructions that require special handling.
|
/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
objdump_test.go | 17 // generates lots of ppc64x instructions not possible with golang so not worth supporting.. 38 // we support more instructions than binutils 72 // Instructions known to libopcodes (or xed) but not to us. 73 // TODO(minux): those single precision instructions are missing from ppc64.csv 74 // those data cache instructions are deprecated, but must be treated as no-ops, see 4.3.2.1 pg. 774. 95 // Instructions explicitly dropped in Power ISA that were in POWER architecture. 96 // See A.30 Deleted Instructions and A.31 Discontiued Opcodes
|
/prebuilts/go/darwin-x86/src/runtime/ |
os_darwin_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
os_freebsd_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
os_openbsd_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
/prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
ppc64.go | 25 // one of the RLD-like instructions that require special handling. 26 // The FMADD-like instructions behave similarly. 47 // one of the CMP instructions that require special handling. 57 // one of the NEG-like instructions that require special handling.
|
s390x.go | 52 // one of the RLD-like instructions that require special handling. 53 // The FMADD-like instructions behave similarly. 70 // one of the CMP instructions that require special handling. 80 // one of the NEG-like instructions that require special handling.
|
/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
objdump_test.go | 17 // generates lots of ppc64x instructions not possible with golang so not worth supporting.. 38 // we support more instructions than binutils 72 // Instructions known to libopcodes (or xed) but not to us. 73 // TODO(minux): those single precision instructions are missing from ppc64.csv 74 // those data cache instructions are deprecated, but must be treated as no-ops, see 4.3.2.1 pg. 774. 95 // Instructions explicitly dropped in Power ISA that were in POWER architecture. 96 // See A.30 Deleted Instructions and A.31 Discontiued Opcodes
|
/prebuilts/go/linux-x86/src/runtime/ |
os_darwin_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
os_freebsd_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
os_openbsd_arm.go | 13 print("atomic synchronization instructions. Recompile using GOARM=7.\n")
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
arch6zk.d | 1 #name: ARM V6 instructions
|
arm7dm.d | 1 # name: ARM 7DM instructions
|
crc32.d | 2 #name: ARMv8 CRC32 instructions
|
tcompat2.d | 5 # Test the Thumb pseudo instructions that exist for ARM source compatibility
|
Completed in 1628 milliseconds
<<21222324252627282930>>