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  /external/llvm/test/MC/MachO/
debug_frame.s 13 .section __TEXT,__text,regular,pure_instructions
29 // CHECK: Section {
54 // CHECK: Section __debug_frame {
i386-large-relocations.s 4 .section __DATA,__const
24 // CHECK: Section __const {
x86_32-scattered-reloc-fallback.s 11 .section __TEXT, __padding
23 // start of the section is more than 24-bits. But need to get the item to
x86_32-sections.s 4 .section __TEXT,__text,regular,pure_instructions
43 .section __TEXT,__picsymbolstub4,symbol_stubs,none,16
63 // CHECK: Section {
82 // CHECK: Section {
100 // CHECK: Section {
118 // CHECK: Section {
136 // CHECK: Section {
154 // CHECK: Section {
172 // CHECK: Section {
190 // CHECK: Section {
    [all...]
  /external/llvm/test/tools/dsymutil/X86/
empty_range.s 1 # This test verifies that an empty range list in the .debug_ranges section
9 .section __TEXT,__text,regular,pure_instructions
20 .section __DWARF,__debug_abbrev,regular,debug
37 .section __DWARF,__debug_info,regular,debug
41 .long 0 ## Offset Into Abbrev. Section
48 .section __DWARF,__debug_ranges,regular,debug
  /external/swiftshader/third_party/LLVM/test/MC/COFF/
seh-section.s 1 // This test ensures that, if the section containing a function has a suffix
2 // (e.g. .text$foo), its unwind info section also has a suffix (.xdata$foo).
23 .section .text$foo,"x"
  /external/swiftshader/third_party/LLVM/test/MC/ELF/
alias-reloc.s 8 .section zed, "", @progbits
call-abs.s 16 .section .note.GNU-stack,"",@progbits
  /external/swiftshader/third_party/LLVM/test/MC/MachO/
debug_frame.s 12 .section __TEXT,__text,regular,pure_instructions
x86_32-sections.s 4 .section __TEXT,__text,regular,pure_instructions
43 .section __TEXT,__picsymbolstub4,symbol_stubs,none,16
67 // CHECK: # Section 0
80 // CHECK: # Section 1
93 // CHECK: # Section 2
106 // CHECK: # Section 3
119 // CHECK: # Section 4
132 // CHECK: # Section 5
145 // CHECK: # Section 6
158 // CHECK: # Section
    [all...]
  /external/syslinux/memdisk/
start32.S 19 .section ".init", "ax"
80 .section ".text","ax"
92 .section ".rodata","a"
98 .section ".bss.large","aw"
  /frameworks/base/tools/incident_section_gen/
Android.mk 23 LOCAL_MODULE := incident-section-gen
  /toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/
exclude-1.s 15 .section .foo1,"e", %progbits
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
le-fpconst.d 1 #objdump: -s --section=.text
10 Contents of section .text:
local_label_coff.d 2 #name: ARM local label relocs to section symbol relocs (COFF)
8 # relocations against section symbols.
local_label_elf.d 2 #name: ARM local label relocs to section symbol relocs (ELF)
8 # relocations against section symbols.
local_label_wince.d 2 #name: ARM local label relocs to section symbol relocs (WinCE)
8 # relocations against section symbols.
macro1.s 9 @ section padding for a.out's sake
mapping.s 18 .section foo,"ax"
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
rd-v32-b3.d 8 Disassembly of section \.text:
18 Disassembly of section \.text\.2:
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/
immediate-006.d 6 Disassembly of section .text:
11 Disassembly of section .rodata:
instruction_packing-002.d 7 Disassembly of section s1:
11 Disassembly of section s2:
instruction_packing-003.d 7 Disassembly of section s1:
12 Disassembly of section s2:
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/elf/
equ-reloc.s 10 .section .bss, "aw", %nobits
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/h8300/
branch-elf.s 1 .section zpage

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