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  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-selective/
2.c 9 void __attribute__((section(".init")))
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/
tlspic2.s 1 .section ".tbss", "awT", @nobits
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-tic6x/
unwind-1.d 7 Contents of section .c6xabi.exidx:
9 Contents of section .far:
unwind-2.d 7 Contents of section .c6xabi.exidx:
9 Contents of section .far:
unwind-3.d 7 Contents of section .c6xabi.exidx:
10 Contents of section .far:
unwind-4.d 7 Contents of section .c6xabi.exidx:
10 Contents of section .far:
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-x86-64/
tlsgd5b.s 2 .section .tdata,"awT",@progbits
tlsgd6b.s 2 .section .tdata,"awT",@progbits
  /external/llvm/bindings/python/llvm/tests/
test_object.py 4 from ..object import Section
19 for section in o.get_sections():
21 assert isinstance(section, Section)
22 assert isinstance(section.name, str)
23 assert isinstance(section.size, long)
24 assert isinstance(section.contents, str)
25 assert isinstance(section.address, long)
26 assert len(section.contents) == section.siz
    [all...]
  /bionic/libc/arch-common/bionic/
crtend_so.S 30 .section .note.GNU-stack,"",%progbits
33 .section .eh_frame,"a",@progbits
  /external/clang/test/OpenMP/
parallel_sections_codegen.cpp 56 #pragma omp section
61 #pragma omp section
  /external/elfutils/tests/
run-dwfl-addr-sect.sh 23 address 0x64 => module "" section 4 + 0
24 address 0x8 => module "" section 1 + 0x8
25 address 0x98 => module "" section 7 + 0
29 address 0x1 => module "" section 1 + 0x1
  /external/llvm/test/MC/ARM/
elf-reloc-02.s 8 // versus section symbol relocs (with offset) -
10 // Default llvm behavior is to emit as section symbol relocs nearly
19 .section .rodata,"a",%progbits
24 // OBJ: Section {{.*}} .rel.text {
  /external/llvm/test/MC/ELF/
relax-arith2.s 7 // CHECK: Disassembly of section imul:
15 .section imul,"x"
24 // CHECK: Disassembly of section and:
32 .section and,"x"
40 // CHECK: Disassembly of section or:
48 .section or,"x"
56 // CHECK: Disassembly of section xor:
64 .section xor,"x"
72 // CHECK: Disassembly of section add:
80 .section add,"x
    [all...]
  /external/llvm/test/MC/MachO/
indirect-symbols.s 8 .section __IMPORT,__jump_table,symbol_stubs,pure_instructions+self_modifying_code,5
15 .section __IMPORT,__pointers,non_lazy_symbol_pointers
38 // CHECK: Section {
57 // CHECK: Section {
78 // CHECK: Section {
103 // CHECK: Type: Section (0xE)
104 // CHECK: Section: __text (0x1)
113 // CHECK: Section: (0x0)
121 // CHECK: Type: Section (0xE)
122 // CHECK: Section: __text (0x1
    [all...]
  /external/llvm/test/MC/PowerPC/
st-other-crash.s 14 // CHECK-NEXT: Section: .group
18 .section .text._ZN4llvm11SmallVectorIcLj0EEC2Ev,"axG",@progbits,_ZN4llvm11SmallVectorIcLj0EEC2Ev,comdat
  /external/swiftshader/third_party/LLVM/test/MC/ELF/
merge.s 1 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s
3 // Test that PIC relocations with local symbols in a mergeable section are done
17 .section .sec1,"aM",@progbits,16
22 .section bar,"ax",@progbits
75 // Section 5 is "sec1"
76 // CHECK: # Section 5
87 // Symbol number 6 is section 5
  /external/swiftshader/third_party/LLVM/test/MC/MachO/
indirect-symbols.s 1 // RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
8 .section __IMPORT,__jump_table,symbol_stubs,pure_instructions+self_modifying_code,5
15 .section __IMPORT,__pointers,non_lazy_symbol_pointers
43 // CHECK: # Section 0
59 // CHECK: # Section 1
75 // CHECK: # Section 2
  /frameworks/base/core/java/android/os/
IIncidentReportStatusListener.aidl 30 void onReportSectionStatus(int section, int status);
  /toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/
group-2.s 1 .section .text.foo,"axG",%progbits,.text.foo,comdat
5 .section .data.bar,"awG",%progbits,.text.foo,comdat
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
adr_1.d 5 Disassembly of section \.text:
b_1.d 5 Disassembly of section \.text:
beq_1.d 5 Disassembly of section \.text:
inst-directive.d 5 Disassembly of section \.text:
ldr_1.d 5 Disassembly of section \.text:

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