OpenGrok
Home
Sort by relevance
Sort by last modified time
Full Search
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:BIT1
(Results
51 - 75
of
248
) sorted by null
1
2
3
4
5
6
7
8
9
10
/device/linaro/bootloader/edk2/SecurityPkg/Include/Library/
Tcg2PhysicalPresenceLib.h
27
#define TCG2_BIOS_TPM_MANAGEMENT_FLAG_PP_REQUIRED_FOR_CLEAR
BIT1
TcgPpVendorLib.h
33
#define TCG_BIOS_TPM_MANAGEMENT_FLAG_NO_PPI_CLEAR
BIT1
TrEEPpVendorLib.h
36
#define TREE_BIOS_TPM_MANAGEMENT_FLAG_NO_PPI_CLEAR
BIT1
TpmCommLib.h
157
#define TIS_PC_ACC_RQUUSE
BIT1
183
#define TIS_PC_STS_RETRY
BIT1
/device/linaro/bootloader/edk2/ShellPkg/Include/Protocol/
EfiShellInterface.h
40
ARG_PARTIALLY_QUOTED =
BIT1
,
/device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
Virtio.h
138
#define VRING_DESC_F_WRITE
BIT1
// buffer to be written *by the host*
163
#define VSTAT_DRIVER
BIT1
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
general_definitions.h
18
#undef
BIT1
54
#define
BIT1
0x00000002U
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/
SDController.c
196
if (ErrorCode &
BIT1
) {
499
}while ((TimeOut2-- > 0) && (Data &
BIT1
));
630
Data &= ~ (BIT5 |
BIT1
| BIT2);
631
Data |=
BIT1
; // Enable block count always
634
Data |= (BIT5 |
BIT1
| BIT2);
636
Data |= (BIT5 |
BIT1
);
669
Data = (CommandIndex << 8) |
BIT1
| BIT4| BIT3;
675
Data = (CommandIndex << 8) | BIT0 |
BIT1
| BIT4| BIT3;
686
Data = (CommandIndex << 8) |
BIT1
;
750
if ((Data &
BIT1
) == BIT1) {
[
all
...]
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
XhciReg.h
143
#define XHC_USBCMD_RESET
BIT1
// Host Controller Reset
160
#define XHC_CRCR_CS
BIT1
// Command Stop
167
#define XHC_PORTSC_PED
BIT1
// Port Enabled/Disabled
184
#define XHC_HUB_PORTSC_PED
BIT1
// Hub's Port Enabled/Disabled
194
#define XHC_IMAN_IE
BIT1
// Interrupt Enable
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/
XhciReg.h
58
#define XHC_USBCMD_RESET
BIT1
// Host Controller Reset
75
#define XHC_CRCR_CS
BIT1
// Command Stop
82
#define XHC_PORTSC_PED
BIT1
// Port Enabled/Disabled
99
#define XHC_HUB_PORTSC_PED
BIT1
// Hub's Port Enabled/Disabled
110
#define XHC_IMAN_IE
BIT1
// Interrupt Enable
/device/linaro/bootloader/edk2/OvmfPkg/QemuVideoDxe/
VbeShim.c
130
//
bit1
in each nibble is Write Enable
134
PciWrite8 (Pam1Address, Pam1 | (
BIT1
| BIT0));
195
//
bit1
: optional information available (must be =1 for VBE v1.2+)
201
VbeModeInfo->ModeAttr = BIT7 | BIT5 | BIT4 | BIT3 |
BIT1
| BIT0;
205
//
bit1
:
bit1
: readable
208
VbeModeInfo->WindowAAttr = BIT2 |
BIT1
| BIT0;
240
//
bit1
: Bytes in reserved field may be used by application
242
VbeModeInfo->DirectColorModeInfo =
BIT1
;
264
// Clear Write Enable (
bit1
), keep Read Enable (bit0) set
[
all
...]
/device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/Omap3530/
Omap3530Gpio.h
58
#define GPIO_SYSCONFIG_SOFTRESET_MASK
BIT1
60
#define GPIO_SYSCONFIG_SOFTRESET_RESET
BIT1
84
#define GPIO_CTRL_GATINGRATIO_DIV_2
BIT1
Omap3530Interrupt.h
45
#define INTCPS_CONTROL_NEWFIQAGR
BIT1
/device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
Omap3530Gpio.h
58
#define GPIO_SYSCONFIG_SOFTRESET_MASK
BIT1
60
#define GPIO_SYSCONFIG_SOFTRESET_RESET
BIT1
84
#define GPIO_CTRL_GATINGRATIO_DIV_2
BIT1
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Library/
I2CLib.h
75
#define I2C_INTR_RX_OVER
BIT1
100
#define STAT_TFNF
BIT1
// TX FIFO is not full
137
#define I2C_INTR_RX_OVER
BIT1
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/
IsaFloppy.h
227
#define MSR_DBB
BIT1
255
#define CCR_DRC (BIT0 |
BIT1
)
361
#define STS0_US1
BIT1
402
#define STS1_NW
BIT1
428
#define STS2_BC
BIT1
453
#define STS3_US1
BIT1
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Usb/UsbMassStorageDxe/
UsbMass.h
46
#define USB_IS_BULK_ENDPOINT(Attribute) (((Attribute) & (BIT0 |
BIT1
)) == USB_ENDPOINT_BULK)
47
#define USB_IS_INTERRUPT_ENDPOINT(Attribute) (((Attribute) & (BIT0 |
BIT1
)) == USB_ENDPOINT_INTERRUPT)
/device/linaro/bootloader/edk2/OptionRomPkg/AtapiPassThruDxe/
AtapiPassThru.h
74
#define IDE_PRIMARY_PROGRAMMABLE_INDICATOR
BIT1
215
#define TK0NF_ERR
BIT1
///< Track 0 Not Found
222
#define EOM_ERR
BIT1
///< End of Media Detected
232
#define HS1
BIT1
249
#define IDX
BIT1
///< Index
257
#define IEN_L
BIT1
///< Interrupt Enable
262
#define OVERLAP
BIT1
269
#define IO
BIT1
[
all
...]
/device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/
PeCoffExtraActionLib.c
36
return (BOOLEAN) (((Dr7 >> (RegisterIndex * 2)) & (BIT0 |
BIT1
)) == (BIT0 |
BIT1
));
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/VlvPlatformInitDxe/
IgdOpRegion.h
72
#define HD_MBOX2
BIT1
95
#define BLC_ENABLE
BIT1
/device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/
TPS65950.h
49
#define LEDBON
BIT1
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/
XPressRich3.h
48
#define PCIE_BAR_WIN_SUPPORT_IO32
BIT1
/device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/
SP805Watchdog.h
40
#define SP805_WDOG_CTRL_RESEN
BIT1
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/
AhciMode.h
25
#define EFI_AHCI_GHC_IE
BIT1
99
#define EFI_AHCI_PORT_IS_PSS
BIT1
122
#define EFI_AHCI_PORT_CMD_SUD
BIT1
164
#define EFI_AHCI_PORT_SERR_RCE
BIT1
/device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/
FormBrowserEx.h
38
#define BROWSER_ACTION_DEFAULT
BIT1
Completed in 9764 milliseconds
1
2
3
4
5
6
7
8
9
10