| /external/llvm/lib/Analysis/ |
| CostModel.cpp | 178 ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(R);
179 if (!RS && Level)
183 if (!Level && !RS && !LS)
188 Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
224 if (!matchPairwiseShuffleMask(RS, false, Level))
226 } else if (matchPairwiseShuffleMask(RS, true, Level)) {
|
| /cts/tests/tests/rscpp/librscpptest/ |
| rs_jni_element.cpp | 37 sp<RS> mRS = new RS();
69 sp<RS> mRS = new RS();
95 sp<RS> mRS = new RS();
164 sp<RS> mRS = new RS();
228 sp<RS> mRS = new RS();
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i370-opc.c | 142 /* The R1 register field in an RX or RS form instruction. */
167 /* The D2 displacement field in an RS form instruction. */
170 { 12, 0, 0, 0, I370_OPERAND_RELATIVE, "RS D2"},
172 /* The R3 register field in an RS form instruction. */
175 { 4, 16, 0, 0, I370_OPERAND_GPR, "RS R3" },
177 /* The B2 base field in an RS form instruction. */
180 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "RS B2"},
182 /* The optional B2 base field in an RS form instruction. */
186 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_OPTIONAL, "RS B2 OPT"},
364 /* An RS form instruction. *
[all...] |
| /external/curl/docs/cmdline-opts/ |
| ftp-method.d | 9 .RS
|
| /external/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 270 RegScavenger *RS = nullptr) const;
278 RegScavenger *RS = nullptr) const {
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.h | 82 RegScavenger *RS) const override;
200 RegScavenger *RS) const;
|
| R600RegisterInfo.cpp | 96 RegScavenger *RS) const {
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiFrameLowering.cpp | 200 RegScavenger *RS) const {
201 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 160 RegScavenger *RS) const {
161 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 78 RegScavenger *RS = nullptr) const override;
114 RegScavenger *RS) const override;
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| MCRegisterInfo.h | 40 unsigned RS, unsigned Al, int CC, bool Allocable,
43 : ID(id), Name(name), RegSize(RS), Alignment(Al), CopyCost(CC),
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinFrameLowering.cpp | 118 RegScavenger *RS) const {
126 RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
|
| /frameworks/compile/slang/ |
| slang_rs_object_ref_count.h | 40 // local variables of RS object types (rs_font, rs_allocation, ...). This
55 std::list<clang::VarDecl*> mRSO; // Declared RS objects in this scope (but
130 // an RS object type.
145 // Given a return statement RS that returns an rsObject, creates a temporary
153 clang::ReturnStmt* RS,
168 // For function parameters and local variables that are or contain RS objects,
251 // rs_allocation .rs.param.a;
252 // rsSetObject(&.rs.param.a, a); // sysRef of obj becomes 2
259 // named with the prefix ".rs.param." added to the parameter name. It calls
285 void VisitReturnStmt(clang::ReturnStmt *RS);
[all...] |
| /frameworks/rs/tests/cpp_api/cppbasic/ |
| compute.cpp | 11 sp<RS> rs = new RS(); local
12 printf("New RS %p\n", rs.get());
15 bool r = rs->init("/system/bin");
18 sp<const Element> e = Element::RGBA_8888(rs);
21 Type::Builder tb(rs, e);
28 sp<Allocation> a1 = Allocation::createSized(rs, e, 1000);
31 sp<Allocation> ain = Allocation::createTyped(rs, t)
[all...] |
| /frameworks/rs/tests/cpp_api/cppbasic-shared/ |
| compute.cpp | 11 sp<RS> rs = new RS(); local
12 printf("New RS %p\n", rs.get());
15 bool r = rs->init("/system/bin");
18 sp<const Element> e = Element::RGBA_8888(rs);
21 Type::Builder tb(rs, e);
28 sp<Allocation> a1 = Allocation::createSized(rs, e, 1000);
31 sp<Allocation> ain = Allocation::createTyped(rs, t)
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 264 RegScavenger *RS = nullptr) const;
272 RegScavenger *RS = nullptr) const {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.h | 86 RegScavenger *RS = nullptr) const override;
|
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.h | 55 RegScavenger *RS) const override;
|
