| /frameworks/compile/mclinker/lib/Target/ARM/TargetInfo/ |
| ARMTargetInfo.cpp | 19 mcld::RegisterTarget<llvm::Triple::arm> X(TheARMTarget, "arm");
20 mcld::RegisterTarget<llvm::Triple::thumb> Y(TheThumbTarget, "thumb");
|
| /frameworks/compile/mclinker/lib/Target/Mips/TargetInfo/ |
| MipsTargetInfo.cpp | 18 mcld::RegisterTarget<llvm::Triple::mipsel> X1(TheMipselTarget, "mipsel");
19 mcld::RegisterTarget<llvm::Triple::mips64el> X2(TheMips64elTarget,
|
| /frameworks/compile/mclinker/lib/Target/X86/TargetInfo/ |
| X86TargetInfo.cpp | 19 mcld::RegisterTarget<llvm::Triple::x86> X(TheX86_32Target, "x86");
20 mcld::RegisterTarget<llvm::Triple::x86_64> Y(TheX86_64Target, "x86-64");
|
| /external/swiftshader/third_party/LLVM/lib/Support/ |
| Triple.cpp | 1 //===--- Triple.cpp - Target triple helper class --------------------------===//
10 #include "llvm/ADT/Triple.h"
16 const char *Triple::getArchTypeName(ArchType Kind) {
50 const char *Triple::getArchTypePrefix(ArchType Kind) {
84 const char *Triple::getVendorTypeName(VendorType Kind) {
96 const char *Triple::getOSTypeName(OSType Kind) {
125 const char *Triple::getEnvironmentTypeName(EnvironmentType Kind) {
137 Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name)
[all...] |
| /external/clang/lib/Basic/ |
| Targets.cpp | 11 // target triple.
29 #include "llvm/ADT/Triple.h"
69 static TargetInfo *AllocateTarget(const llvm::Triple &Triple,
80 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
83 OSTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
84 : TgtInfo(Triple, Opts) {}
97 void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple
[all...] |
| /external/llvm/unittests/ExecutionEngine/MCJIT/ |
| MCJITTestAPICommon.h | 19 #include "llvm/ADT/Triple.h"
49 // On Windows, generate ELF objects by specifying "-elf" in triple
52 HostTriple = Triple::normalize(HostTriple);
57 Triple Host(HostTriple);
79 Triple Host(HostTriple);
93 SmallVector<Triple::ArchType, 4> SupportedArchs;
94 SmallVector<Triple::ArchType, 1> HasSubArchs;
96 SmallVector<Triple::OSType, 4> UnsupportedOSs;
97 SmallVector<Triple::EnvironmentType, 1> UnsupportedEnvironments;
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 22 MipsELFObjectWriter(bool is64Bit, Triple::OSType OSType, uint16_t EMachine,
78 Triple::OSType OSType;
80 MipsEB_AsmBackend(const Target &T, Triple::OSType _OSType)
95 Triple::OSType OSType;
97 MipsEL_AsmBackend(const Target &T, Triple::OSType _OSType)
112 Triple TheTriple(TT);
116 return new MipsEL_AsmBackend(T, Triple(TT).getOS());
|
| /external/clang/lib/Driver/ |
| ToolChain.cpp | 41 const llvm::Triple &Triple,
52 if (!Triple.isPS4CPU())
68 ToolChain::ToolChain(const Driver &D, const llvm::Triple &T,
70 : D(D), Triple(T), Args(Args), CachedRTTIArg(GetRTTIArgument(Args)),
71 CachedRTTIMode(CalculateRTTIMode(Args, Triple, CachedRTTIArg)) {
190 // the same as the ones that appear in the triple. Roughly speaking, this is
193 switch (Triple.getArch()) {
194 case llvm::Triple::ppc:
196 case llvm::Triple::ppc64
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.h | 27 class Triple;
30 const Triple &TT;
33 explicit WebAssemblyRegisterInfo(const Triple &TT);
|
| /frameworks/compile/mclinker/include/mcld/Target/ |
| GNUInfo.h | 11 #include <llvm/ADT/Triple.h>
21 explicit GNUInfo(const llvm::Triple& pTriple);
67 const llvm::Triple& m_Triple;
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackendWinCOFF.h | 19 ARMAsmBackendWinCOFF(const Target &T, const Triple &TheTriple)
|
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiMCAsmInfo.cpp | 16 #include "llvm/ADT/Triple.h"
22 LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple &TheTriple) {
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmInfo.cpp | 16 SystemZMCAsmInfo::SystemZMCAsmInfo(const Triple &TT) {
|
| /external/swiftshader/third_party/LLVM/lib/MC/ |
| MCELFObjectTargetWriter.cpp | 15 Triple::OSType OSType_,
|
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUMCAsmInfo.cpp | 12 #include "llvm/ADT/Triple.h"
16 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() {
20 MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 8 : 16;
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/clang/include/clang/Basic/ |
| AttrHasAttributeImpl.inc | 9 const llvm::Triple &T = Target.getTriple();
17 .Case("interrupt", (T.getArch() == llvm::Triple::arm || T.getArch() == llvm::Triple::thumb || T.getArch() == llvm::Triple::armeb || T.getArch() == llvm::Triple::thumbeb) ? 1 : 0)
18 .Case("interrupt", (T.getArch() == llvm::Triple::avr) ? 1 : 0)
19 .Case("signal", (T.getArch() == llvm::Triple::avr) ? 1 : 0)
48 .Case("interrupt", (T.getArch() == llvm::Triple::x86 || T.getArch() == llvm::Triple::x86_64) ? 1 : 0)
98 .Case("dllexport", (T.getArch() == llvm::Triple::x86 || T.getArch() == llvm::Triple::x86_64 || T.getArch() == llvm::Triple::arm || T.getArch() == (…)
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/clang/include/clang/Basic/ |
| AttrHasAttributeImpl.inc | 9 const llvm::Triple &T = Target.getTriple();
17 .Case("interrupt", (T.getArch() == llvm::Triple::arm || T.getArch() == llvm::Triple::thumb || T.getArch() == llvm::Triple::armeb || T.getArch() == llvm::Triple::thumbeb) ? 1 : 0)
18 .Case("interrupt", (T.getArch() == llvm::Triple::avr) ? 1 : 0)
19 .Case("signal", (T.getArch() == llvm::Triple::avr) ? 1 : 0)
48 .Case("interrupt", (T.getArch() == llvm::Triple::x86 || T.getArch() == llvm::Triple::x86_64) ? 1 : 0)
98 .Case("dllexport", (T.getArch() == llvm::Triple::x86 || T.getArch() == llvm::Triple::x86_64 || T.getArch() == llvm::Triple::arm || T.getArch() == (…)
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCTargetDesc.h | 29 class Triple;
47 const Triple &TT, StringRef CPU);
50 const Triple &TT, StringRef CPU);
53 const Triple &TT, StringRef CPU);
56 const Triple &TT, StringRef CPU);
62 StringRef selectMipsCPU(const Triple &TT, StringRef CPU);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.h | 37 PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
56 const Triple &TT = getTargetTriple();
57 return (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le);
66 PPC32TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
77 PPC64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.h | 31 class Triple;
55 std::string ParseX86Triple(const Triple &TT);
57 unsigned getDwarfRegFlavour(const Triple &TT, bool isEH);
63 MCSubtargetInfo *createX86MCSubtargetInfo(const Triple &TT, StringRef CPU,
72 const Triple &TT, StringRef CPU);
74 const Triple &TT, StringRef CPU);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ |
| TargetLibraryInfo.cpp | 15 #include "llvm/ADT/Triple.h"
24 /// specified target triple. This should be carefully written so that a missing
25 /// target triple gets a sane set of defaults.
26 static void initialize(TargetLibraryInfo &TLI, const Triple &T) {
34 } else if (T.getOS() == Triple::IOS) {
42 if (T.getArch() != Triple::xcore && T.getArch() != Triple::tce) {
54 initialize(*this, Triple());
57 TargetLibraryInfo::TargetLibraryInfo(const Triple &T) : ImmutablePass(ID) {
|
| /external/llvm/lib/ExecutionEngine/ |
| TargetSelect.cpp | 17 #include "llvm/ADT/Triple.h"
28 Triple TT;
40 TargetMachine *EngineBuilder::selectTarget(const Triple &TargetTriple,
44 Triple TheTriple(TargetTriple);
48 // Adjust the triple to match what the user requested.
64 // Adjust the triple to match (if known), otherwise stick with the
65 // requested/host triple.
66 Triple::ArchType Type = Triple::getArchTypeForLLVMName(MArch);
67 if (Type != Triple::UnknownArch
[all...] |
| /external/clang/lib/Frontend/ |
| InitHeaderSearch.cpp | 25 #include "llvm/ADT/Triple.h"
78 const llvm::Triple &triple);
87 void AddDefaultCIncludePaths(const llvm::Triple &triple,
92 void AddDefaultCPlusPlusIncludePaths(const llvm::Triple &triple,
98 const llvm::Triple &triple,
180 const llvm::Triple &triple)
[all...] |
| /frameworks/compile/mclinker/lib/Target/X86/ |
| X86Emulation.cpp | 24 llvm::Triple::ArchType arch = pConfig.targets().triple().getArch();
25 assert(arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64);
26 if (arch == llvm::Triple::x86 ||
27 pConfig.targets().triple().getEnvironment() == llvm::Triple::GNUX32) {
50 if (pConfig.targets().triple().isOSDarwin()) {
54 if (pConfig.targets().triple().isOSWindows()) {
|
| /frameworks/rs/rsov/compiler/ |
| RemoveNonkernelsPass.cpp | 19 #include "llvm/ADT/Triple.h"
37 Triple TT(M.getTargetTriple());
45 case Triple::arm:
48 case Triple::aarch64:
51 case Triple::spir:
52 case Triple::spir64:
53 DEBUG(dbgs() << "!!! Already a spir triple !!!\n");
56 DEBUG(dbgs() << "New triple:\t" << NewTriple << "\n");
|
