/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
GPRArith.cpp | 33 constexpr uint32_t V0 = 0xEFAB; 40 test.setDwordTo(T0, V0); 51 constexpr uint32_t V0 = 0xF00F00; \ 61 test.setDwordTo(T0, V0); \ 521 const uint32_t V0 = Value1; \ 530 test.setDwordTo(T0, V0); \ [all...] |
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
GPRArith.cpp | 18 constexpr uint64_t V0 = 0x3AABBEFABBBAA3ull; 25 test.setQwordTo(T0, V0); 39 constexpr uint32_t V0 = 0xF00F00; \ 48 test.setDwordTo(T0, V0); \ [all...] |
ControlFlow.cpp | 162 const uint64_t V0 = 0xA0C0FFEEBEEFFEEFull; \ 177 test.setQwordTo(T0, V0); \
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/art/runtime/arch/mips/ |
context_mips.cc | 74 gprs_[V0] = const_cast<uint32_t*>(&gZero);
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quick_method_frame_info_mips.h | 41 (1 << art::mips::AT) | (1 << art::mips::V0) | (1 << art::mips::V1) |
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/art/runtime/arch/mips64/ |
context_mips64.cc | 74 gprs_[V0] = const_cast<uintptr_t*>(&gZero);
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quick_method_frame_info_mips64.h | 43 (1 << art::mips64::AT) | (1 << art::mips64::V0) | (1 << art::mips64::V1) |
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/external/llvm/lib/Target/Mips/ |
MipsLongBranch.cpp | 454 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) 456 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) 457 .addReg(Mips::V0).addExternalSymbol("_gp_disp", MipsII::MO_ABS_LO); 458 MBB.removeLiveIn(Mips::V0);
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MipsAsmPrinter.cpp | 851 EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0); 854 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE); 857 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE); 860 EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE); [all...] |
/external/mesa3d/src/mesa/main/ |
macros.h | 493 #define ASSIGN_3V( V, V0, V1, V2 ) \ 495 V[0] = V0; \ 596 #define ASSIGN_2V( V, V0, V1 ) \ 598 V[0] = V0; \
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
MipsBaseInfo.h | 32 case Mips::V0: case Mips::V0_64: case Mips::F2: case Mips::D2_64:
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/prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/ |
s390x.s | 305 VO V2, V1, V0 // e7021000006a 307 VSCBIB V0, V23, V24 // e78700000cf5 325 VGFMAH V21, V31, V24, V0 // VGFMAH V31, V24, V21, V0 // e705f10087bc 330 VPERM V31, V0, V2, V3 // VPERM V0, V2, V31, V3 // e73f0000248c
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/prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/ |
s390x.s | 305 VO V2, V1, V0 // e7021000006a 307 VSCBIB V0, V23, V24 // e78700000cf5 325 VGFMAH V21, V31, V24, V0 // VGFMAH V31, V24, V21, V0 // e705f10087bc 330 VPERM V31, V0, V2, V3 // VPERM V0, V2, V31, V3 // e73f0000248c
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/prebuilts/go/darwin-x86/src/runtime/ |
asm_s390x.s | 1119 VLL R4, (R3), V0 // contains first 16 bytes of sep 1127 VREPH $0, V0, V1 1150 VREPH $0, V0, V1 1151 VREPB $2, V0, V8 1179 VREPF $0, V0, V1 1211 VCEQGS V0, V1, V3 1214 VCEQGS V0, V2, V4 1221 VCEQGS V0, V1, V2 1233 VCEQG V0, V2, V4 [all...] |
/prebuilts/go/linux-x86/src/runtime/ |
asm_s390x.s | 1119 VLL R4, (R3), V0 // contains first 16 bytes of sep 1127 VREPH $0, V0, V1 1150 VREPH $0, V0, V1 1151 VREPB $2, V0, V8 1179 VREPF $0, V0, V1 1211 VCEQGS V0, V1, V3 1214 VCEQGS V0, V2, V4 1221 VCEQGS V0, V1, V2 1233 VCEQG V0, V2, V4 [all...] |
/device/linaro/bootloader/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/ |
DefaultExceptionHandler.c | 164 DEBUG ((EFI_D_ERROR, "\n V0 0x%016lx %016lx V1 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V0[1], SystemContext.SystemContextAArch64->V0[0], SystemContext.SystemContextAArch64->V1[1], SystemContext.SystemContextAArch64->V1[0]));
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/prebuilts/go/darwin-x86/src/crypto/elliptic/ |
p256_asm_s390x.s | 76 #define Y1L V0 131 #define X1L V0 211 #define X1L V0 303 #define X1L V0 392 #define T0 V0 518 #define X0 V0 894 // V0-V3,V30,V31 - Not Modified 900 #define X0 V0 // Not modified [all...] |
/prebuilts/go/linux-x86/src/crypto/elliptic/ |
p256_asm_s390x.s | 76 #define Y1L V0 131 #define X1L V0 211 #define X1L V0 303 #define X1L V0 392 #define T0 V0 518 #define X0 V0 894 // V0-V3,V30,V31 - Not Modified 900 #define X0 V0 // Not modified [all...] |
/art/compiler/utils/mips/ |
assembler_mips_test.cc | 59 registers_.push_back(new mips::Register(mips::V0)); 92 secondary_register_names_.emplace(mips::Register(mips::V0), "v0"); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 223 SDValue V0 = N->getOperand(i+1); 225 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg();
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/external/llvm/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 29 static inline unsigned short MakeMask(unsigned V0, unsigned V1, 31 return (V0 << (3*4)) | (V1 << (2*4)) | (V2 << (1*4)) | (V3 << (0*4));
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/external/mesa3d/src/gallium/auxiliary/util/ |
u_math.h | 670 #define ASSIGN_4V( DST, V0, V1, V2, V3 ) \ 672 (DST)[0] = (V0); \
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/external/mesa3d/src/mesa/vbo/ |
vbo_attrib_tmp.h | 33 #define ATTRI( A, N, V0, V1, V2, V3 ) \ 34 ATTR_UNION(A, N, GL_INT, fi_type, INT_AS_UNION(V0), INT_AS_UNION(V1), \ 36 #define ATTRUI( A, N, V0, V1, V2, V3 ) \ 37 ATTR_UNION(A, N, GL_UNSIGNED_INT, fi_type, UINT_AS_UNION(V0), UINT_AS_UNION(V1), \ 39 #define ATTRF( A, N, V0, V1, V2, V3 ) \ 40 ATTR_UNION(A, N, GL_FLOAT, fi_type, FLOAT_AS_UNION(V0), FLOAT_AS_UNION(V1),\ 42 #define ATTRD( A, N, V0, V1, V2, V3 ) \ 43 ATTR_UNION(A, N, GL_DOUBLE, double, V0, V1, V2, V3) [all...] |
/external/swiftshader/third_party/LLVM/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 29 static inline unsigned short MakeMask(unsigned V0, unsigned V1, 31 return (V0 << (3*4)) | (V1 << (2*4)) | (V2 << (1*4)) | (V3 << (0*4));
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/external/llvm/lib/Target/Hexagon/ |
HexagonRegisterInfo.cpp | 70 V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13,
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