| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| ifunc-13.s | 24 .global f3
25 .hidden f3
30 define f3,.arm
40 test_relocs f3
|
| ifunc-6.s | 27 .global f3
29 .hidden f3
34 define f3,.arm
51 test_relocs f3,.w
|
| ifunc-10.s | 56 define2 f3
59 alldirs .globl,f3
60 alldirs .hidden,f3
69 test_relocs2 f3,a,
80 test_relocs2 f3,t,.w
89 alldirs diff,f3
|
| ifunc-4.s | 56 define2 f3
61 alldirs .globl,f3
62 alldirs .hidden,f3
74 test_relocs2 f3,a,
85 test_relocs2 f3,t,.w
94 alldirs diff,f3
|
| ifunc-8.s | 55 define2 f3
57 alldirs .globl,f3
58 alldirs .hidden,f3
67 test_relocs2 f3,a,
78 test_relocs2 f3,t,.w
87 alldirs diff,f3
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| vsx2.d | 42 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
43 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
46 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
48 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
50 a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| avx512dq.d | 193 [ ]*[a-f0-9]+:[ ]*62 f3 fd 4f 19 ee ab[ ]*vextractf64x2 \$0xab,%zmm5,%xmm6\{%k7\}
194 [ ]*[a-f0-9]+:[ ]*62 f3 fd cf 19 ee ab[ ]*vextractf64x2 \$0xab,%zmm5,%xmm6\{%k7\}\{z\}
195 [ ]*[a-f0-9]+:[ ]*62 f3 fd 4f 19 ee 7b[ ]*vextractf64x2 \$0x7b,%zmm5,%xmm6\{%k7\}
196 [ ]*[a-f0-9]+:[ ]*62 f3 7d 4f 1b ee ab[ ]*vextractf32x8 \$0xab,%zmm5,%ymm6\{%k7\}
197 [ ]*[a-f0-9]+:[ ]*62 f3 7d cf 1b ee ab[ ]*vextractf32x8 \$0xab,%zmm5,%ymm6\{%k7\}\{z\}
198 [ ]*[a-f0-9]+:[ ]*62 f3 7d 4f 1b ee 7b[ ]*vextractf32x8 \$0x7b,%zmm5,%ymm6\{%k7\}
199 [ ]*[a-f0-9]+:[ ]*62 f3 fd 4f 39 ee ab[ ]*vextracti64x2 \$0xab,%zmm5,%xmm6\{%k7\}
200 [ ]*[a-f0-9]+:[ ]*62 f3 fd cf 39 ee ab[ ]*vextracti64x2 \$0xab,%zmm5,%xmm6\{%k7\}\{z\}
201 [ ]*[a-f0-9]+:[ ]*62 f3 fd 4f 39 ee 7b[ ]*vextracti64x2 \$0x7b,%zmm5,%xmm6\{%k7\}
202 [ ]*[a-f0-9]+:[ ]*62 f3 7d 4f 3b ee ab[ ]*vextracti32x8 \$0xab,%zmm5,%ymm6\{%k7\
[all...] |
| avx512f-rcigrd-intel.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 3f 1d ee ab[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 3f 1d ee 7b[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0x7b
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 26 f5 ab[ ]*vgetmantpd zmm6,zmm5,\{sae\},0xab
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 26 f5 7b[ ]*vgetmantpd zmm6,zmm5,\{sae\},0x7b
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 26 f5 ab[ ]*vgetmantps zmm6,zmm5,\{sae\},0xab
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 26 f5 7b[ ]*vgetmantps zmm6,zmm5,\{sae\},0x7b
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 27 f4 ab[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 27 f4 7b[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0x7b
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 27 f4 ab[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 27 f4 7b[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0x7
[all...] |
| avx512f-rcigrd.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 3f 1d ee ab[ ]*vcvtps2ph \$0xab,\{sae\},%zmm5,%ymm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 3f 1d ee 7b[ ]*vcvtps2ph \$0x7b,\{sae\},%zmm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 26 f5 ab[ ]*vgetmantpd \$0xab,\{sae\},%zmm5,%zmm6
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 26 f5 7b[ ]*vgetmantpd \$0x7b,\{sae\},%zmm5,%zmm6
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 26 f5 ab[ ]*vgetmantps \$0xab,\{sae\},%zmm5,%zmm6
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 26 f5 7b[ ]*vgetmantps \$0x7b,\{sae\},%zmm5,%zmm6
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 27 f4 ab[ ]*vgetmantsd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 27 f4 7b[ ]*vgetmantsd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 27 f4 ab[ ]*vgetmantss \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 27 f4 7b[ ]*vgetmantss \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\
[all...] |
| avx512f-rcigrne-intel.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 1f 1d ee ab[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 1f 1d ee 7b[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0x7b
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 18 26 f5 ab[ ]*vgetmantpd zmm6,zmm5,\{sae\},0xab
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 18 26 f5 7b[ ]*vgetmantpd zmm6,zmm5,\{sae\},0x7b
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 18 26 f5 ab[ ]*vgetmantps zmm6,zmm5,\{sae\},0xab
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 18 26 f5 7b[ ]*vgetmantps zmm6,zmm5,\{sae\},0x7b
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 1f 27 f4 ab[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 1f 27 f4 7b[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0x7b
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 1f 27 f4 ab[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 1f 27 f4 7b[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0x7
[all...] |
| avx512f-rcigrne.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 1f 1d ee ab[ ]*vcvtps2ph \$0xab,\{sae\},%zmm5,%ymm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 1f 1d ee 7b[ ]*vcvtps2ph \$0x7b,\{sae\},%zmm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 18 26 f5 ab[ ]*vgetmantpd \$0xab,\{sae\},%zmm5,%zmm6
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 18 26 f5 7b[ ]*vgetmantpd \$0x7b,\{sae\},%zmm5,%zmm6
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 18 26 f5 ab[ ]*vgetmantps \$0xab,\{sae\},%zmm5,%zmm6
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 18 26 f5 7b[ ]*vgetmantps \$0x7b,\{sae\},%zmm5,%zmm6
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 1f 27 f4 ab[ ]*vgetmantsd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 1f 27 f4 7b[ ]*vgetmantsd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 1f 27 f4 ab[ ]*vgetmantss \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 1f 27 f4 7b[ ]*vgetmantss \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\
[all...] |
| avx512f-rcigru-intel.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 5f 1d ee ab[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 5f 1d ee 7b[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0x7b
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 58 26 f5 ab[ ]*vgetmantpd zmm6,zmm5,\{sae\},0xab
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 58 26 f5 7b[ ]*vgetmantpd zmm6,zmm5,\{sae\},0x7b
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 58 26 f5 ab[ ]*vgetmantps zmm6,zmm5,\{sae\},0xab
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 58 26 f5 7b[ ]*vgetmantps zmm6,zmm5,\{sae\},0x7b
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 5f 27 f4 ab[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 5f 27 f4 7b[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0x7b
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 5f 27 f4 ab[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 5f 27 f4 7b[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0x7
[all...] |
| avx512f-rcigru.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 5f 1d ee ab[ ]*vcvtps2ph \$0xab,\{sae\},%zmm5,%ymm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 5f 1d ee 7b[ ]*vcvtps2ph \$0x7b,\{sae\},%zmm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 58 26 f5 ab[ ]*vgetmantpd \$0xab,\{sae\},%zmm5,%zmm6
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 58 26 f5 7b[ ]*vgetmantpd \$0x7b,\{sae\},%zmm5,%zmm6
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 58 26 f5 ab[ ]*vgetmantps \$0xab,\{sae\},%zmm5,%zmm6
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 58 26 f5 7b[ ]*vgetmantps \$0x7b,\{sae\},%zmm5,%zmm6
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 5f 27 f4 ab[ ]*vgetmantsd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 5f 27 f4 7b[ ]*vgetmantsd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 5f 27 f4 ab[ ]*vgetmantss \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 5f 27 f4 7b[ ]*vgetmantss \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\
[all...] |
| avx512f-rcigrz-intel.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 7f 1d ee ab[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 7f 1d ee 7b[ ]*vcvtps2ph ymm6\{k7\},zmm5,\{sae\},0x7b
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 78 26 f5 ab[ ]*vgetmantpd zmm6,zmm5,\{sae\},0xab
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 78 26 f5 7b[ ]*vgetmantpd zmm6,zmm5,\{sae\},0x7b
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 78 26 f5 ab[ ]*vgetmantps zmm6,zmm5,\{sae\},0xab
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 78 26 f5 7b[ ]*vgetmantps zmm6,zmm5,\{sae\},0x7b
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 7f 27 f4 ab[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 7f 27 f4 7b[ ]*vgetmantsd xmm6\{k7\},xmm5,xmm4,\{sae\},0x7b
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 7f 27 f4 ab[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0xab
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 7f 27 f4 7b[ ]*vgetmantss xmm6\{k7\},xmm5,xmm4,\{sae\},0x7
[all...] |
| avx512f-rcigrz.d | 24 [ ]*[a-f0-9]+:[ ]*62 f3 7d 7f 1d ee ab[ ]*vcvtps2ph \$0xab,\{sae\},%zmm5,%ymm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f3 7d 7f 1d ee 7b[ ]*vcvtps2ph \$0x7b,\{sae\},%zmm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f3 fd 78 26 f5 ab[ ]*vgetmantpd \$0xab,\{sae\},%zmm5,%zmm6
38 [ ]*[a-f0-9]+:[ ]*62 f3 fd 78 26 f5 7b[ ]*vgetmantpd \$0x7b,\{sae\},%zmm5,%zmm6
39 [ ]*[a-f0-9]+:[ ]*62 f3 7d 78 26 f5 ab[ ]*vgetmantps \$0xab,\{sae\},%zmm5,%zmm6
40 [ ]*[a-f0-9]+:[ ]*62 f3 7d 78 26 f5 7b[ ]*vgetmantps \$0x7b,\{sae\},%zmm5,%zmm6
41 [ ]*[a-f0-9]+:[ ]*62 f3 d5 7f 27 f4 ab[ ]*vgetmantsd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
42 [ ]*[a-f0-9]+:[ ]*62 f3 d5 7f 27 f4 7b[ ]*vgetmantsd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
43 [ ]*[a-f0-9]+:[ ]*62 f3 55 7f 27 f4 ab[ ]*vgetmantss \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
44 [ ]*[a-f0-9]+:[ ]*62 f3 55 7f 27 f4 7b[ ]*vgetmantss \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\
[all...] |
| x86-64-simd-intel.d | 14 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd xmm1,QWORD PTR \[rip\+0x12345678\] # 12345697 <_start\+0x12345697>
17 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq xmm1,XMMWORD PTR \[rip\+0x12345678\] # 123456ae <_start\+0x123456ae>
18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ss xmm1,QWORD PTR \[rax\]
33 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu XMMWORD PTR \[rip\+0x12345678\],xmm1 # 123456fc <_start\+0x123 (…)
[all...] |
| x86-64-simd-suffix.d | 14 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd 0x12345678\(%rip\),%xmm1 # 12345697 <_start\+0x12345697>
17 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq 0x12345678\(%rip\),%xmm1 # 123456ae <_start\+0x123456ae>
18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ssl %eax,%xmm1
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ssl %eax,%xmm1
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ssq %rax,%xmm1
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ssq %rax,%xmm1
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ssq \(%rax\),%xmm1
33 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu %xmm1,0x12345678\(%rip\) # 123456fc <_start\+0x123456fc
[all...] |
| x86-64-simd.d | 13 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd 0x12345678\(%rip\),%xmm1 # 12345697 <_start\+0x12345697>
16 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq 0x12345678\(%rip\),%xmm1 # 123456ae <_start\+0x123456ae>
17 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
19 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
21 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
23 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
25 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
27 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
29 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ssq \(%rax\),%xmm1
32 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu %xmm1,0x12345678\(%rip\) # 123456fc <_start\+0x123456fc
[all...] |
| /prebuilts/go/darwin-x86/test/fixedbugs/ |
| issue6866.go | 68 b3_0 = f3 / (f0 * f3)
69 b3_1 = f3 / (f1 * f2)
70 b3_2 = f3 / (f2 * f1)
71 b3_3 = f3 / (f3 * f0)
79 f3 = f2 * 3
78 f3 = f2 * 3 const
|
| /prebuilts/go/linux-x86/test/fixedbugs/ |
| issue6866.go | 68 b3_0 = f3 / (f0 * f3)
69 b3_1 = f3 / (f1 * f2)
70 b3_2 = f3 / (f2 * f1)
71 b3_3 = f3 / (f3 * f0)
79 f3 = f2 * 3
78 f3 = f2 * 3 const
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 14 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd xmm1,QWORD PTR \[rip\+0x12345678\] # 12345697 <_start\+0x12345697>
17 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq xmm1,XMMWORD PTR \[rip\+0x12345678\] # 123456ae <_start\+0x123456ae>
18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ss xmm1,QWORD PTR \[rax\]
33 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu XMMWORD PTR \[rip\+0x12345678\],xmm1 # 123456fc <_start\+0x123 (…)
[all...] |
| x86-64-simd-suffix.d | 14 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd 0x12345678\(%rip\),%xmm1 # 12345697 <_start\+0x12345697>
17 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq 0x12345678\(%rip\),%xmm1 # 123456ae <_start\+0x123456ae>
18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ssl %eax,%xmm1
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ssl %eax,%xmm1
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ssq %rax,%xmm1
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ssq %rax,%xmm1
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ssq \(%rax\),%xmm1
33 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu %xmm1,0x12345678\(%rip\) # 123456fc <_start\+0x123456fc
[all...] |
| x86-64-simd.d | 14 [ ]*[a-f0-9]+: f3 0f e6 0d 78 56 34 12 cvtdq2pd 0x12345678\(%rip\),%xmm1 # 12345697 <_start\+0x12345697>
17 [ ]*[a-f0-9]+: f3 0f 5b 0d 78 56 34 12 cvttps2dq 0x12345678\(%rip\),%xmm1 # 123456ae <_start\+0x123456ae>
18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ssl \(%rax\),%xmm1
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ssq \(%rax\),%xmm1
33 [ ]*[a-f0-9]+: f3 0f 7f 0d 78 56 34 12 movdqu %xmm1,0x12345678\(%rip\) # 123456fc <_start\+0x123456fc
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
| regress01.d | 13 c: f3 ff 50 2c fst.l %f16,-16\(%sp\)\+\+
14 10: f3 ff 54 2c fst.l %f20,-16\(%sp\)\+\+
15 14: f3 ff 58 2c fst.l %f24,-16\(%sp\)\+\+
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-spu/ |
| icache1.s | 10 .word f1, f2, f3, f4
21 brsl $0,f3
45 .section ".f3.part1","ax",@progbits
46 .type f3,@function
47 f3: label
50 .size f3,.-f3
|
