| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| common.d | 85 128: (fe 80 f1 11|11 f1 80 fe) fnabs. f20,f30
86 12c: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
119 1b0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
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| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_rtl_ppc64.S | 98 stfd f30,304(r3)
243 stfd f30,304(r3)
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/math/ |
| fpu_asm.S | 65 fcmpu cr1,f0,f30
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/sparc/ |
| v9.S | 75 ldd [%l0+ARGS+120], %f30
174 std %f30, [FP-8]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| loongson-3a.d | 67 .*: 4b7eef0b psrah \$f28,\$f29,\$f30
|
| loongson-3a.s | 62 psrah $f28, $f29, $f30
|
| set-arch.d | 107 0000018c <[^>]*> 46d1f711 movt\.ps \$f28,\$f30,\$fcc4
108 00000190 <[^>]*> 46c5f712 movz\.ps \$f28,\$f30,a1
109 00000194 <[^>]*> 4c0417ae msub\.ps \$f30,\$f0,\$f2,\$f4
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| loongson-2e.s | 78 psrah $f28, $f29, $f30
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| loongson-2f.s | 78 psrah $f28, $f29, $f30
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| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Framework/ |
| SmmCis.h | 376 UINT64 f30[2];
member in struct:__anon8173
|
| /external/clang/test/CodeGen/ |
| x86_32-arguments-darwin.c | 129 // CHECK-LABEL: define i16 @f30()
130 struct s30 { char a; char b : 4; } f30(void) { while (1) {} } function
|
| x86_64-arguments.c | 235 void f30(struct S0 p_4) { function
236 // CHECK-LABEL: define void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
|
| arm64-arguments.c | 113 // CHECK: define i64 @f30()
115 struct s30 f30() {} function
|
| /external/libunwind/src/ia64/ |
| getcontext.S | 170 stf.spill [r9] = f30 // M2
|
| Ginstall_cursor.S | 145 ldf.fill f30 = [r30] // f30 restored (don't touch no more)
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips3.s | 17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
76 trunc.w.s $f28,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 47 trunc.w.s $f28,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| valid.s | 29 c.sf.d $f30,$f0
75 mul.s $f30,$f10,$f2
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| /external/mesa3d/src/mesa/sparc/ |
| sparc_matrix.h | 49 #define M14 %f30
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips64.s | 34 movt.s $f30,$f2,$fcc1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/ |
| crypto.d | 26 40: bc ce 38 fa aes_dround23_l %f24, %f26, %f28, %f30
|
| hpcvis3.d | 37 6c: bd fe 38 da fumsubd %f24, %f26, %f28, %f30
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
| rD_rA_rB.d | 16 c: 2f30 add! r15, r3
17 e: 2f30 add! r15, r3
|
| /external/google-breakpad/src/common/android/ |
| breakpad_getcontext.S | 381 s.d $f30, (30 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Ipf/ |
| IpfThunk.s | 347 stf.spill [sp]=f28,-16;; stf.spill [sp]=f29,-16;; stf.spill [sp]=f30,-16;; stf.spill [sp]=f31,-16;;
403 ldf.fill f31=[sp],16;; ldf.fill f30=[sp],16;; ldf.fill f29=[sp],16;; ldf.fill f28=[sp],16;;
|
