| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| ExpandPostRAPseudos.cpp | 197 TII = MF.getTarget().getInstrInfo();
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| MachineBasicBlock.cpp | 282 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
472 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
510 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
564 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl);
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| MachineRegisterInfo.cpp | 68 const TargetInstrInfo *TII = TM.getInstrInfo();
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| Spiller.cpp | 69 tii = mf.getTarget().getInstrInfo();
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| PostRASchedulerList.cpp | 194 TM.getInstrInfo()->CreateTargetPostRAHazardRecognizer(InstrItins, this);
208 TII = Fn.getTarget().getInstrInfo();
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 250 TII = static_cast<const Thumb2InstrInfo*>(TM.getInstrInfo());
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| ARMFrameLowering.cpp | 129 *static_cast<const ARMBaseInstrInfo*>(MF.getTarget().getInstrInfo());
326 *static_cast<const ARMBaseInstrInfo*>(MF.getTarget().getInstrInfo());
556 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
619 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeDelaySlotFiller.cpp | 48 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 48 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 46 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
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| SparcISelDAGToDAG.cpp | 69 unsigned GlobalBaseReg = TM.getInstrInfo()->getGlobalBaseReg(MF);
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| /external/llvm/lib/CodeGen/ |
| MachineBasicBlock.cpp | 375 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
405 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
690 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
815 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
[all...] |
| EarlyIfConversion.cpp | 156 TII = MF.getSubtarget().getInstrInfo();
796 TII = STI.getInstrInfo();
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| PostRASchedulerList.cpp | 216 MF.getSubtarget().getInstrInfo()->CreateTargetPostRAHazardRecognizer(
286 TII = Fn.getSubtarget().getInstrInfo();
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| GCRootLowering.cpp | 337 TII = MF.getSubtarget().getInstrInfo();
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| MachineCopyPropagation.cpp | 363 TII = MF.getSubtarget().getInstrInfo();
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| MachineInstrBundle.cpp | 120 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
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| MachineSSAUpdater.cpp | 41 TII = MF.getSubtarget().getInstrInfo();
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| ShrinkWrap.cpp | 169 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
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| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 298 const ARMBaseInstrInfo &TII = *STI.getInstrInfo();
701 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo());
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ConditionalCompares.cpp | 191 TII = MF.getSubtarget().getInstrInfo();
892 TII = MF.getSubtarget().getInstrInfo();
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| AArch64AdvSIMDScalarPass.cpp | 407 TII = mf.getSubtarget().getInstrInfo();
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| AArch64ConditionOptimizer.cpp | 324 TII = MF.getSubtarget().getInstrInfo();
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| /external/llvm/lib/Target/AMDGPU/ |
| R600ExpandSpecialInstrs.cpp | 69 TII = ST.getInstrInfo();
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| SIFoldOperands.cpp | 302 const SIInstrInfo *TII = ST.getInstrInfo();
|
