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    Searched refs:getRegisterInfo (Results 176 - 200 of 424) sorted by null

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  /external/llvm/lib/CodeGen/
EarlyIfConversion.cpp 157 TRI = MF.getSubtarget().getRegisterInfo();
797 TRI = STI.getRegisterInfo();
CallingConvLower.cpp 31 TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C),
GCRootLowering.cpp 342 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
MachineCopyPropagation.cpp 362 TRI = MF.getSubtarget().getRegisterInfo();
MachineInstrBundle.cpp 121 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
ShrinkWrap.cpp 442 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
TargetInstrInfo.cpp 353 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
553 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
673 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ConditionalCompares.cpp 192 TRI = MF.getSubtarget().getRegisterInfo();
893 TRI = MF.getSubtarget().getRegisterInfo();
  /external/llvm/lib/Target/ARM/
ARMFrameLowering.cpp 59 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
296 const MCRegisterInfo *MRI = Context.getRegisterInfo();
297 const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo();
699 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
816 MF.getSubtarget().getRegisterInfo());
    [all...]
  /external/llvm/lib/Target/Lanai/
LanaiInstrInfo.cpp 104 const TargetRegisterInfo *TRI = &getRegisterInfo();
321 const TargetRegisterInfo *TRI = &getRegisterInfo();
  /external/llvm/lib/MC/MCDisassembler/
Disassembler.cpp 309 const MCRegisterInfo *MRI = DC->getRegisterInfo();
  /external/llvm/lib/Target/AMDGPU/
SIFoldOperands.cpp 303 const SIRegisterInfo &TRI = TII->getRegisterInfo();
  /external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.h 283 const HexagonRegisterInfo &getRegisterInfo() const { return RI; }
HexagonRDFOpt.cpp 282 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsMCCodeEmitter.cpp 129 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0);
130 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1);
765 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg);
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCVSXFMAMutate.cpp 74 const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
  /external/llvm/lib/Target/SystemZ/MCTargetDesc/
SystemZMCCodeEmitter.cpp 141 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
  /external/llvm/lib/Target/X86/
X86ExpandPseudo.cpp 257 TRI = STI->getRegisterInfo();
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
ProcessImplicitDefs.cpp 88 TRI = fn.getTarget().getRegisterInfo();
RegisterScavenging.cpp 83 TRI = TM.getRegisterInfo();
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMBaseInstrInfo.h 46 virtual const ARMBaseRegisterInfo &getRegisterInfo() const =0;
MLxExpansionPass.cpp 314 TRI = Fn.getTarget().getRegisterInfo();
  /external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsAsmPrinter.cpp 189 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
MipsFrameLowering.cpp 143 static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
  /external/swiftshader/third_party/LLVM/tools/lto/
LTOCodeGenerator.cpp 315 MCContext Context(*_target->getMCAsmInfo(), *_target->getRegisterInfo(), NULL);

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1 2 3 4 5 6 78 91011>>