| /external/llvm/test/MC/ARM/ |
| directive-arch-semantic-action.s | 5 @ CHECK: error: instruction requires: data-barriers
9 @ CHECK-NOT: error: instruction requires: data-barriers
|
| ldrd-strd-gnu-arm-bad-imm.s | 3 @ CHECK: error: instruction requires: thumb2
7 @ CHECK: error: instruction requires: thumb2
|
| ldrd-strd-gnu-thumb-bad-regs.s | 4 @ CHECK: error: invalid operand for instruction
8 @ CHECK: error: invalid operand for instruction
|
| vmov-vmvn-illegal-cases.s | 4 @ CHECK: error: invalid operand for instruction
6 @ CHECK: error: invalid operand for instruction
8 @ CHECK: error: invalid operand for instruction
10 @ CHECK: error: invalid operand for instruction
13 @ CHECK: error: invalid operand for instruction
15 @ CHECK: error: invalid operand for instruction
17 @ CHECK: error: invalid operand for instruction
19 @ CHECK: error: invalid operand for instruction
|
| udf-arm-diagnostics.s | 10 @ CHECK: error: instruction 'udf' is not predicable, but condition code specified
16 @ CHECK: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/ |
| branch-pseudos-bad.s | 7 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
9 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
11 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
13 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
15 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
17 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
19 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
21 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
24 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available
26 # CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not availabl
[all...] |
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 8 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/X86/ |
| validate-inst-intel.s | 6 # CHECK: error: invalid operand for instruction
12 # CHECK: error: invalid operand for instruction
|
| /external/proguard/src/proguard/classfile/editor/ |
| InstructionAdder.java | 25 import proguard.classfile.instruction.*;
26 import proguard.classfile.instruction.visitor.InstructionVisitor;
58 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction)
60 // Add the instruction.
61 codeAttributeComposer.appendInstruction(offset, instruction);
67 // Create a copy of the instruction.
68 Instruction newConstantInstruction =
73 // Add the instruction.
|
| /external/r8/src/main/java/com/android/tools/r8/ir/code/ |
| InstructionIterator.java | 9 public interface InstructionIterator extends Iterator<Instruction> {
11 * Replace the current instruction (aka the {@link Instruction} returned by the previous call to
14 * The current instruction will be completely detached from the instruction stream with uses
17 * If the current instruction produces an out-value the new instruction must also produce
21 * The debug information of the current instruction will be attached to the new instruction.
23 * @param newInstruction the instruction to insert instead of the current
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/ |
| DualReferenceInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
|
| ReferenceInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
38 public interface ReferenceInstruction extends Instruction {
|
| SwitchPayload.java | 32 package org.jf.dexlib2.iface.instruction;
|
| /external/smali/smalidea/src/main/java/org/jf/smalidea/dexlib/instruction/ |
| SmalideaArrayPayload.java | 32 package org.jf.smalidea.dexlib.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.ArrayPayload;
45 public SmalideaArrayPayload(@Nonnull SmaliInstruction instruction) {
46 super(instruction);
|
| /external/smali/smalidea/src/main/java/org/jf/smalidea/util/ |
| InstructionUtils.java | 47 for (SmaliInstruction instruction: method.getInstructions()) {
48 if (instruction.getOpcode() == opcode) {
49 SmaliLabelReference labelReference = instruction.getTarget();
60 return instruction;
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| group-reloc-ldr-parsing-bad.l | 2 [^:]*:7: Error: this group relocation is not allowed on this instruction -- `ldr r0,\[r0,#:pc_g0_nc:\(f\)\]'
3 [^:]*:8: Error: this group relocation is not allowed on this instruction -- `ldr r0,\[r0,#:pc_g1_nc:\(f\)\]'
4 [^:]*:9: Error: this group relocation is not allowed on this instruction -- `ldr r0,\[r0,#:sb_g0_nc:\(f\)\]'
5 [^:]*:10: Error: this group relocation is not allowed on this instruction -- `ldr r0,\[r0,#:sb_g1_nc:\(f\)\]'
6 [^:]*:12: Error: this group relocation is not allowed on this instruction -- `str r0,\[r0,#:pc_g0_nc:\(f\)\]'
7 [^:]*:13: Error: this group relocation is not allowed on this instruction -- `str r0,\[r0,#:pc_g1_nc:\(f\)\]'
8 [^:]*:14: Error: this group relocation is not allowed on this instruction -- `str r0,\[r0,#:sb_g0_nc:\(f\)\]'
9 [^:]*:15: Error: this group relocation is not allowed on this instruction -- `str r0,\[r0,#:sb_g1_nc:\(f\)\]'
10 [^:]*:17: Error: this group relocation is not allowed on this instruction -- `ldrb r0,\[r0,#:pc_g0_nc:\(f\)\]'
11 [^:]*:18: Error: this group relocation is not allowed on this instruction -- `ldrb r0,\[r0,#:pc_g1_nc:\(f\)\]
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| rdseed.s | 1 # Check RdSeed instruction.
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mipsr6@cache.d | 2 #name: MIPS CACHE instruction
6 # Check MIPS CACHE instruction assembly.
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| invalid-dspr2.s | 8 absq_s.ph $8,$a0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 absq_s.qb $15,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 absq_s.w $s3,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 addq.ph $s1,$15,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 addq_s.ph $s3,$s6,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 addq_s.w $a2,$8,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 addqh.ph $s4,$14,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 addqh_r.ph $sp,$25,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 addsc $s8,$15,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 addu.ph $a2,$14,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /art/compiler/optimizing/ |
| graph_checker.cc | 32 static bool IsAllowedToJumpToExitBlock(HInstruction* instruction) {
33 return instruction->IsThrow() || instruction->IsReturn() || instruction->IsReturnVoid();
96 // Ensure `block` ends with a branch instruction.
99 // instruction. Such code is removed during the SSA-building DCE phase.
101 AddError(StringPrintf("Block %d does not end with a branch instruction.",
113 AddError(StringPrintf("Unexpected instruction %s:%d jumps into the exit block.",
146 AddError(StringPrintf("The recorded last instruction of block %d does not match "
147 "the actual last instruction %d."
[all...] |
| graph_checker.h | 50 void VisitInstruction(HInstruction* instruction) OVERRIDE;
54 void VisitBooleanNot(HBooleanNot* instruction) OVERRIDE;
55 void VisitBoundType(HBoundType* instruction) OVERRIDE;
59 void VisitConstant(HConstant* instruction) OVERRIDE;
60 void VisitDeoptimize(HDeoptimize* instruction) OVERRIDE;
61 void VisitIf(HIf* instruction) OVERRIDE;
65 void VisitNeg(HNeg* instruction) OVERRIDE;
66 void VisitPackedSwitch(HPackedSwitch* instruction) OVERRIDE;
69 void VisitSelect(HSelect* instruction) OVERRIDE;
71 void VisitTypeConversion(HTypeConversion* instruction) OVERRIDE
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips3.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 dmult $s7,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
| AnalyzedInstruction.java | 38 import org.jf.dexlib2.iface.instruction.*;
39 import org.jf.dexlib2.iface.instruction.formats.Instruction22c;
51 * The MethodAnalyzer containing this instruction
57 * The actual instruction
60 protected Instruction instruction; field in class:AnalyzedInstruction
63 * The index of the instruction, where the first instruction in the method is at index 0, and so on
80 * This contains the register types *before* the instruction has executed
86 * This contains the register types *after* the instruction has execute
[all...] |
| /art/runtime/interpreter/mterp/mips/ |
| op_nop.S | 3 GOTO_OPCODE(t0) # jump to next instruction
|
| /art/runtime/interpreter/mterp/mips64/ |
| op_nop.S | 3 GOTO_OPCODE v0 # jump to next instruction
|
