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  /external/boringssl/src/crypto/fipsmodule/aes/asm/
aes-armv4.pl 205 stmdb sp!,{r1,r4-r12,lr}
301 ldmia sp!,{r4-r12,lr}
302 tst lr,#1
303 moveq pc,lr @ be binary compatible with V4, yet
304 bx lr @ interoperable with Thumb ISA:-)
311 str lr,[sp,#-4]! @ push lr
319 mov lr,#255
321 and $i1,lr,$s0
322 and $i2,lr,$s0,lsr#
    [all...]
  /external/boringssl/ios-arm/crypto/fipsmodule/
aes-armv4.S 176 stmdb sp!,{r1,r4-r12,lr}
272 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
273 tst lr,#1
274 moveq pc,lr @ be binary compatible with V4, yet
284 str lr,[sp,#-4]! @ push lr
292 mov lr,#255
294 and r7,lr,r0
295 and r8,lr,r0,lsr#8
296 and r9,lr,r0,lsr#1
    [all...]
  /external/boringssl/linux-arm/crypto/fipsmodule/
aes-armv4.S 175 stmdb sp!,{r1,r4-r12,lr}
271 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
272 tst lr,#1
273 moveq pc,lr @ be binary compatible with V4, yet
281 str lr,[sp,#-4]! @ push lr
289 mov lr,#255
291 and r7,lr,r0
292 and r8,lr,r0,lsr#8
293 and r9,lr,r0,lsr#1
    [all...]
  /bionic/libc/arch-arm/bionic/
__bionic_clone.S 59 bxls lr
64 # Setting lr to 0 will make the unwinder stop at __start_thread.
65 mov lr, #0
  /device/linaro/bootloader/edk2/ArmPlatformPkg/Sec/Arm/
Helper.S 38 mov lr, r0 @ Use the pass entrypoint as lr
52 adr lr, returned_exception
53 movs pc, lr
61 bx lr
73 bx lr @ return (hopefully thumb-safe!)
Helper.asm 36 mov lr, r0 // Use the pass entrypoint as lr
51 adr lr, returned_exception
52 movs pc, lr
60 bx lr
72 bx lr // return (hopefully thumb-safe!)
  /external/llvm/test/MC/ARM/AlignedBundling/
pad-align-to-bundle-end.s 8 bx lr
19 bx lr
28 bx lr
  /external/llvm/test/MC/ARM/
eh-compact-pr0.s 16 .save {r11, lr}
17 push {r11, lr}
20 pop {r11, lr}
21 mov pc, lr
30 .save {r11, lr}
31 push {r11, lr}
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/
pic.d 13 8: 0c ae f0 00 add r12,lr \|\| nop
21 18: 0c ae f0 00 add r12,lr \|\| nop
29 28: 0c ae f0 00 add r12,lr \|\| nop
  /art/runtime/interpreter/mterp/out/
mterp_arm64.S 53 r30 : (lr) is reserved (the link register).
379 SAVE_TWO_REGS fp, lr, 64
    [all...]
  /device/linaro/bootloader/edk2/ArmPkg/Library/BaseMemoryLibStm/Arm/
SetMem.asm 41 stmfd sp!, {r4-r11, lr}
46 movls lr, #0
47 andhi lr, r3, #1
48 cmp lr, #0
67 cmp lr, #0
73 movls lr, r3
  /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/
memset.S 32 bxeq lr
45 bxeq lr
53 bx lr
  /external/compiler-rt/lib/builtins/arm/
comparesf2.S 102 JMP(lr)
131 JMP(lr)
145 JMP(lr)
  /external/selinux/libselinux/src/
label_backends_android.c 18 struct selabel_lookup_rec lr; /* holds contexts for lookup result */ member in struct:spec
63 if (strcmp(spec_arr[jj].lr.ctx_raw,
64 curr_spec->lr.ctx_raw)) {
69 spec_arr[jj].lr.ctx_raw,
70 curr_spec->lr.ctx_raw);
122 spec_arr[nspec].lr.ctx_raw = context;
125 if (selabel_validate(rec, &spec_arr[nspec].lr) < 0) {
128 path, lineno, spec_arr[nspec].lr.ctx_raw);
283 free(spec->lr.ctx_raw);
284 free(spec->lr.ctx_trans)
    [all...]
  /prebuilts/go/darwin-x86/src/runtime/
signal_arm.go 29 print("lr ", hex(c.lr()), "\n")
40 func (c *sigctxt) siglr() uintptr { return uintptr(c.lr()) }
44 // We arrange lr, and pc to pretend the panicking
46 // Always save LR to stack so that panics in leaf
52 *(*uint32)(unsafe.Pointer(uintptr(sp))) = c.lr()
60 if pc != 0 && findfunc(pc) == nil && findfunc(uintptr(c.lr())) != nil {
  /prebuilts/go/linux-x86/src/runtime/
signal_arm.go 29 print("lr ", hex(c.lr()), "\n")
40 func (c *sigctxt) siglr() uintptr { return uintptr(c.lr()) }
44 // We arrange lr, and pc to pretend the panicking
46 // Always save LR to stack so that panics in leaf
52 *(*uint32)(unsafe.Pointer(uintptr(sp))) = c.lr()
60 if pc != 0 && findfunc(pc) == nil && findfunc(uintptr(c.lr())) != nil {
  /system/core/debuggerd/crasher/arm/
crashglue.S 54 mov lr, #0
55 ldr lr, [lr]
  /toolchain/binutils/binutils-2.25/gold/testsuite/
thumb_bl_out_of_range.s 15 bx lr
28 bx lr
61 bx lr
thumb_bl_out_of_range_local.s 15 bx lr
28 bx lr
60 bx lr
thumb_blx_in_range.s 20 bx lr
31 bx lr
63 bx lr
  /bionic/libc/arch-arm/cortex-a15/bionic/
memset.S 48 // Preserve lr for backtrace.
49 push {lr}
51 .cfi_rel_offset lr, 0
140 bx lr
173 bx lr
  /bionic/libc/arch-arm/cortex-a7/bionic/
memset.S 48 // Preserve lr for backtrace.
49 push {lr}
51 .cfi_rel_offset lr, 0
117 bx lr
162 bx lr
  /bionic/libc/arch-arm/generic/bionic/
strcpy.S 93 bx lr
104 bxeq lr
124 bx lr
133 bx lr
  /bionic/libc/arch-arm/syscalls/
___fsetxattr.S 19 bxls lr
___mremap.S 19 bxls lr

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