| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/i386-linux-gnu/asm/ |
| msr.h | 4 #include <asm/msr-index.h>
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/x86_64-linux-gnu/asm/ |
| msr.h | 4 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r10/platforms/android-21/arch-x86/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r10/platforms/android-21/arch-x86_64/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r10/platforms/android-23/arch-x86/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r10/platforms/android-23/arch-x86_64/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-21/arch-x86/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-21/arch-x86_64/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-23/arch-x86/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-23/arch-x86_64/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-24/arch-x86/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /prebuilts/ndk/r11/platforms/android-24/arch-x86_64/usr/include/asm/ |
| msr.h | 21 #include <asm/msr-index.h>
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| msr-imm-bad.d | 1 # name: Cannot use MSR with immediates in thumb mode.
3 # error-output: msr-imm-bad.l
4 # source: msr-imm.s
|
| msr-reg-bad.d | 3 # error-output: msr-reg-bad.l
4 # source: msr-reg.s
|
| mrs-msr-arm-v7-a-bad.d | 1 # name: MRS/MSR negative test, architecture v7-A, ARM mode
2 # error-output: mrs-msr-arm-v7-a-bad.l
|
| mrs-msr-arm-v7-a-bad.l | 4 [^:]*:7: Error: selected processor does not support requested special purpose register -- `msr iapsr,r4'
|
| mrs-msr-thumb-v7-m-bad.d | 1 # name: MRS/MSR negative test, architecture v7-M, Thumb mode
2 # error-output: mrs-msr-thumb-v7-m-bad.l
|
| mrs-msr-thumb-v7-m.d | 2 #name: MRS/MSR test, architecture v7-M, Thumb mode
13 0+0c <[^>]*> f383 8803 msr PSR, r3
14 0+10 <[^>]*> f384 8800 msr CPSR_f, r4
15 0+14 <[^>]*> f385 8801 msr IAPSR, r5
16 0+18 <[^>]*> f386 8810 msr PRIMASK, r6
|
| mrs-msr-thumb-v6t2.d | 2 #name: MRS/MSR test, architecture v6t2, Thumb mode
13 0+0c <[^>]*> f384 8c00 msr CPSR_fs, r4
14 0+10 <[^>]*> f385 8800 msr CPSR_f, r5
15 0+14 <[^>]*> f396 8900 msr SPSR_fc, r6
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| sysreg.s | 5 msr pmovsclr_el0, x7
8 msr pmovsset_el0, x7
28 msr s3_0_c4_c6_0, x0
31 msr s2_1_c0_c3_0, x0
|
| /device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/ |
| bl31_entrypoint.S | 62 msr sctlr_el3, x0
87 msr sctlr_el3, x0
106 msr vbar_el3, x1
114 msr daifclr, #DAIF_ABT_BIT
137 msr cptr_el3, x1
174 msr spsel, #0
|
| /external/llvm/test/MC/AArch64/ |
| arm64-system-encoding.s | 58 ; MSR/MRS instructions
60 msr ACTLR_EL1, x3
61 msr ACTLR_EL2, x3
62 msr ACTLR_EL3, x3
63 msr AFSR0_EL1, x3
64 msr AFSR0_EL2, x3
65 msr AFSR0_EL3, x3
66 msr AFSR1_EL1, x3
67 msr AFSR1_EL2, x3
68 msr AFSR1_EL3, x
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/AArch64/ |
| ArmLibSupportV8.S | 55 msr daifclr, #DAIF_ABORT_BIT
61 msr daifset, #DAIF_ABORT_BIT
67 msr daifclr, #DAIF_IRQ_BIT
73 msr daifset, #DAIF_IRQ_BIT
79 msr daifclr, #DAIF_FIQ_BIT
85 msr daifset, #DAIF_FIQ_BIT
91 msr daifclr, #DAIF_INT_BITS
97 msr daifset, #DAIF_INT_BITS
103 msr daifset, #DAIF_ALL
113 msr csselr_el1, x0 // Write Cache Size Selection Register (CSSELR)
[all...] |
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Sec/AArch64/ |
| Helper.S | 35 msr hcr_el2, x0 // Write back our settings
37 msr cptr_el2, xzr // Disable copro traps to EL2
39 msr sctlr_el2, xzr
44 msr cnthctl_el2, x0
48 msr cntkctl_el1, x0
53 msr vpidr_el2, x0
54 msr vmpidr_el2, x1
75 msr elr_el3, x0
85 msr spsr_el3, x0 // Write to spsr
90 msr spsr_el3, x0
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/bl1/aarch64/ |
| bl1_entrypoint.S | 52 msr sctlr_el3, x0
70 msr sctlr_el3, x0
78 msr vbar_el3, x0
86 msr daifclr, #DAIF_ABT_BIT
109 msr cptr_el3, x0
|
