| /prebuilts/go/linux-x86/src/runtime/cgo/ |
| gcc_arm.S | 22 * Called from standard ARM EABI, where r4-r11 are callee-save, so they
27 push {r4, r5, r6, r7, r8, r9, r10, r11, ip, lr}
28 mov r4, r0
35 .word 0xe12fff34 // blx r4 // fn()
37 pop {r4, r5, r6, r7, r8, r9, r10, r11, ip, pc}
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb1_unified.s | 10 subs r4, r4, #0x83
15 ldr r3, [r4, #4]
|
| thumb.s | 5 lsr r3, r4, #31
10 lsr r3, r4, #0
11 asr r4, r5, #0
17 add r2, r4, #2
19 sub r2, r4, #7
21 mov r4, #255
27 eor r4, r6
30 asr r4, r6
32 sbc r0, r4
33 ror r1, r4
[all...] |
| arm3.s | 6 swpgeb r4, r1, [r5]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| dv-safe.s | 12 cmp.eq p3, p4 = r3, r4 ;;
15 (p1) mov r4 = 2
16 (p2) mov r4 = 5
|
| opc-m.d | 10 0: 18 20 00 0a 00 10 \[MMB\] ld1 r4=\[r5\]
11 6: 40 30 14 00 24 00 ld1 r4=\[r5\],r6
13 10: 18 20 00 0a 00 16 \[MMB\] ld1 r4=\[r5\],-256
14 16: 40 00 14 04 20 00 ld1\.nt1 r4=\[r5\]
16 20: 18 20 18 0a 02 12 \[MMB\] ld1\.nt1 r4=\[r5\],r6
17 26: 40 68 14 04 2c 00 ld1\.nt1 r4=\[r5\],-243
19 30: 18 20 00 0a 06 10 \[MMB\] ld1\.nta r4=\[r5\]
20 36: 40 30 14 0c 24 00 ld1\.nta r4=\[r5\],r6
22 40: 18 20 68 0a 06 16 \[MMB\] ld1\.nta r4=\[r5\],-230
23 46: 40 00 14 40 20 00 ld1\.s r4=\[r5\
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| band_nrg_v5.s | 29 stmdb sp!, {r4 - r11, lr}
35 mov r4, #0
40 mov r2, r4, lsl #1
70 str r14, [r3, +r4, lsl #2]
71 add r4, r4, #1
73 cmp r4, r5
79 ldmia sp!, {r4 - r11, pc}
86 stmdb sp!, {r4 - r11, lr}
94 mov r4, #
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| 476.d | 10 0: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5
11 4: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5
12 8: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5
13 c: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5
14 10: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5
15 14: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5
16 18: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5
17 1c: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5
18 20: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5
19 24: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-rm-t32-all-low-in-it-block.cc | 99 {{ls, r4, r3, r6}, true, ls, "ls r4 r3 r6", "ls_r4_r3_r6"},
100 {{pl, r5, r3, r4}, true, pl, "pl r5 r3 r4", "pl_r5_r3_r4"},
103 {{vc, r4, r3, r4}, true, vc, "vc r4 r3 r4", "vc_r4_r3_r4"},
105 {{ls, r3, r4, r0}, true, ls, "ls r3 r4 r0", "ls_r3_r4_r0"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32-all-low-rd-is-rn-in-it-block.cc | 111 {{lt, r0, r0, r4}, true, lt, "lt r0 r0 r4", "lt_r0_r0_r4"},
117 {{cc, r4, r4, r3}, true, cc, "cc r4 r4 r3", "cc_r4_r4_r3"},
121 {{cc, r4, r4, r4}, true, cc, "cc r4 r4 r4", "cc_r4_r4_r4"}
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| loadd_test.s | 10 loadd 0x1234,(r4,r3)
11 loadd 0x1234,(r5,r4)
24 loadd [r12]0x1234,(r4,r3)
25 loadd [r13]0x1234,(r4,r3)
26 loadd [r12]0x1234,(r5,r4)
27 loadd [r13]0x1234,(r5,r4)
35 loadd 0x1234(r1,r0),(r4,r3)
36 loadd 0x1234(r3,r2),(r5,r4)
40 loadd -0x1234(r1,r0),(r4,r3)
41 loadd -0x1234(r3,r2),(r5,r4)
[all...] |
| stord_test.s | 10 stord (r4,r3),0x1234
11 stord (r5,r4),0x1234
24 stord (r4,r3),[r12]0x1234
25 stord (r4,r3),[r13]0x1234
26 stord (r5,r4),[r12]0x1234
27 stord (r5,r4),[r13]0x1234
35 stord (r4,r3),0x1234(r1,r0)
36 stord (r5,r4),0x1234(r3,r2)
40 stord (r4,r3),-0x1234(r1,r0)
41 stord (r5,r4),-0x1234(r3,r2)
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/BaseMemoryLibStm/Arm/ |
| SetMem.asm | 41 stmfd sp!, {r4-r11, lr}
55 and r4, r2, #0xff
56 orr r4, r4, r4, LSL #8
57 orr r4, r4, r4, LSL #16
58 mov r5, r4
59 mov r6, r4
[all...] |
| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/mme/ |
| com9097.mme | 65 parm $r4
70 send $r4
94 read $r4 0x840
102 mov $r7 (or $r3 $r4)
133 read $r4 0x840
141 mov $r7 (or $r3 $r4)
168 read $r4 0x830
176 mov $r7 (or $r1 $r4)
210 read $r4 0x840
218 mov $r7 (or $r1 $r4)
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/ |
| sh3-dsp.s | 17 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
18 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
19 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
20 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}, arch_sh_up}
22 and r5,r4 ;!/* 0010nnnnmmmm1001 and <REG_M>,<REG_N> */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}, arch_sh_up}
36 cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up}
37 cmp/ge r5,r4 ;!/* 0011nnnnmmmm0011 cmp/ge <REG_M>,<REG_N>*/{"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}, arch_sh_up}
38 cmp/gt r5,r4 ;!/* 0011nnnnmmmm0111 cmp/gt <REG_M>,<REG_N>*/{"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}, arch_sh_up}
39 cmp/hi r5,r4 ;!/* 0011nnnnmmmm0110 cmp/hi <REG_M>,<REG_N>*/{"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}, arch_sh_up}
40 cmp/hs r5,r4 ;!/* 0011nnnnmmmm0010 cmp/hs <REG_M>,<REG_N>*/{"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG (…)
[all...] |
| sh.s | 15 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
16 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
17 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
18 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}, arch_sh_up}
20 and r5,r4 ;!/* 0010nnnnmmmm1001 and <REG_M>,<REG_N> */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}, arch_sh_up}
30 cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up}
31 cmp/ge r5,r4 ;!/* 0011nnnnmmmm0011 cmp/ge <REG_M>,<REG_N>*/{"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}, arch_sh_up}
32 cmp/gt r5,r4 ;!/* 0011nnnnmmmm0111 cmp/gt <REG_M>,<REG_N>*/{"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}, arch_sh_up}
33 cmp/hi r5,r4 ;!/* 0011nnnnmmmm0110 cmp/hi <REG_M>,<REG_N>*/{"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}, arch_sh_up}
34 cmp/hs r5,r4 ;!/* 0011nnnnmmmm0010 cmp/hs <REG_M>,<REG_N>*/{"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG (…)
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/ |
| sh3-dsp.s | 17 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
18 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
19 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
20 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}, arch_sh_up}
22 and r5,r4 ;!/* 0010nnnnmmmm1001 and <REG_M>,<REG_N> */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}, arch_sh_up}
36 cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up}
37 cmp/ge r5,r4 ;!/* 0011nnnnmmmm0011 cmp/ge <REG_M>,<REG_N>*/{"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}, arch_sh_up}
38 cmp/gt r5,r4 ;!/* 0011nnnnmmmm0111 cmp/gt <REG_M>,<REG_N>*/{"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}, arch_sh_up}
39 cmp/hi r5,r4 ;!/* 0011nnnnmmmm0110 cmp/hi <REG_M>,<REG_N>*/{"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}, arch_sh_up}
40 cmp/hs r5,r4 ;!/* 0011nnnnmmmm0010 cmp/hs <REG_M>,<REG_N>*/{"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG (…)
[all...] |
| sh.s | 15 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
16 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
17 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
18 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}, arch_sh_up}
20 and r5,r4 ;!/* 0010nnnnmmmm1001 and <REG_M>,<REG_N> */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}, arch_sh_up}
30 cmp/eq r5,r4 ;!/* 0011nnnnmmmm0000 cmp/eq <REG_M>,<REG_N>*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}, arch_sh_up}
31 cmp/ge r5,r4 ;!/* 0011nnnnmmmm0011 cmp/ge <REG_M>,<REG_N>*/{"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}, arch_sh_up}
32 cmp/gt r5,r4 ;!/* 0011nnnnmmmm0111 cmp/gt <REG_M>,<REG_N>*/{"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}, arch_sh_up}
33 cmp/hi r5,r4 ;!/* 0011nnnnmmmm0110 cmp/hi <REG_M>,<REG_N>*/{"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}, arch_sh_up}
34 cmp/hs r5,r4 ;!/* 0011nnnnmmmm0010 cmp/hs <REG_M>,<REG_N>*/{"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG (…)
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| vector2.s | 13 r3.h=r3.l=sign(r4.h)*r5.h+sign(r4.l)*r5.l ;
16 r4.h=r4.l=sign(r5.h)*r6.h+sign(r5.l)*r6.l ;
18 r2.h=r2.l=sign(r3.h)*r4.h+sign(r3.l)*r4.l ;
30 r3 = vit_max (r4, r5) (asr) ; /* shift right, dual operation */
33 r4 = vit_max(r5, r6)(asl) ; /* shift left, dual operation */ define
35 r2 = vit_max(r3, r4)(asl) ; /* shift left, dual operation */
44 r4.l = vit_max (r5)(asl) ; /* shift left, single operation *
57 r4 = abs r5 (v) ; define
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| prefix.d | 8 [ ]+0:[ ]+0001 454a[ ]+move\.b \[\$?r0\+0\],\$?r4
9 [ ]+4:[ ]+0031 564e[ ]+move\.w \[\$?r6=\$?r3\+0\],\$?r4
10 [ ]+8:[ ]+ff11 454a[ ]+move\.b \[\$?r1-1\],\$?r4
11 [ ]+c:[ ]+ff01 564e[ ]+move\.w \[\$?r6=\$?r0-1\],\$?r4
12 [ ]+10:[ ]+8011 454a[ ]+move\.b \[\$?r1-128\],\$?r4
13 [ ]+14:[ ]+8071 564e[ ]+move\.w \[\$?r6=\$?r7-128\],\$?r4
14 [ ]+18:[ ]+7f11 454a[ ]+move\.b \[\$?r1\+127\],\$?r4
15 [ ]+1c:[ ]+7fb1 564a[ ]+move\.w \[\$?r11\+127\],\$?r4
16 [ ]+20:[ ]+4f4d 0000 679e[ ]+move\.d \[\$?r7=\$?r4\+0\],\$?r9
17 [ ]+26:[ ]+4f5d 0100 454a[ ]+move\.b \[\$?r5\+1\],\$?r4
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| syscall.S | 33 stmfd sp!, {r4, r5, r6, r7}
35 .cfi_rel_offset r4, 0
43 ldmfd ip, {r3, r4, r5, r6}
45 ldmfd sp!, {r4, r5, r6, r7}
|
| /external/clang/test/Misc/ |
| verify.c | 13 struct s r4; // expected-error-re {{{{^}}tentative}} variable in typeref:struct:s
|
| /external/valgrind/none/tests/x86/ |
| incdec_alt.c | 7 int r1,r2,r3,r4,r5,r6,r7,r8,a1,a2; variable
32 "\tpopl " VG_SYM(r4) "\n"
58 r1=r2=r3=r4=r5=r6=r7=r8=0;
63 printf("0x%08x\n",r4);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arc/ |
| ld.s | 5 ld.a r1,[r3,r4]
7 ldw.x.a r2,[r3,r4]
|
| ld2.s | 6 ld.a r4,[r2,10]
9 ldw r3,[r4,-2]
|
