| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| mrs-msr-arm-v6.s | 5 mrs r4, apsr
11 msr apsr_nzcvq, r4
|
| mrs-msr-arm-v7-a.s | 5 mrs r4, apsr
11 msr apsr_nzcvq, r4
|
| mrs-msr-thumb-v7-m-bad.s | 5 mrs r4, cpsr
7 msr apsr_nzcvqg, r4
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| jal_test.d | 12 6: 14 00 32 80 jal \(r3,r2\),\(r4,r3\)
13 a: 14 00 30 80 jal \(r1,r0\),\(r4,r3\)
|
| mul_test.s | 18 mulb r3,r4
36 mulw r3,r4
44 mulsb r3,r4
52 mulsw r3,(r4,r3)
60 macqw r4,r5,(r5,r4)
62 macuw r4,r5,(r8,r7)
64 macsw r4,r5,(r7,r6)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| labfloat.d | 9 [ ]+0:[ ]+6f4e 0600 0000[ ]+move.d 6 <start\+0x6>,\$?r4
11 [ ]+6:[ ]+ef4e 0600 0000[ ]+cmp\.d 6 <start\+0x6>,\$?r4
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| operands.s | 4 zxt2 r4 = r5, r6
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/ |
| interfere.s | 7 trap #1 || cmp r3, r4 ; { dg-error "write to the same" }
9 rte || addx r3, r4 ; { dg-error "write to the same" }
11 cmp r1, r2 || addx r3, r4 ; { dg-error "write to the same" }
13 mvtc r0, psw || addx r1, r4 ; { dg-error "write to the same" }
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/ |
| lineseparator.d | 9 0x0+0000 200b883a mov r5,r4
10 0x0+0004 2809883a mov r4,r5
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/s390/ |
| esa-operands.s | 8 .insn rs,0xba000000,%r1,%r2,3(%r4)
10 .insn rx,0x58000000,%r1,2(%r3,%r4)
12 .insn rxf,0xed000000001e,%f1,%f2,3(%r4,%r5)
16 .insn sse,0xe50100000000,1(%r2),3(%r4)
|
| esa-operands.d | 14 10: ba 12 40 03 [ ]*cs %r1,%r2,3\(%r4\)
17 18: 58 13 40 02 [ ]*l %r1,2\(%r3,%r4\)
19 22: ed 24 50 03 10 1e [ ]*madb %f1,%f2,3\(%r4,%r5\)
23 36: e5 01 20 01 40 03 [ ]*tprot 1\(%r2\),3\(%r4\)
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| ifunc-1.s | 10 ldr r4,1f
11 ldr r4,2f
12 ldr r4,3f
13 ldr r4,4f
|
| ifunc-9.s | 10 ldr r4,1f
11 ldr r4,2f
12 ldr r4,3f
13 ldr r4,4f
|
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8-in-it-block.cc | 103 {{ge, r4, r4, 195}, true, ge, "ge r4 r4 195", "ge_r4_r4_195"},
111 {{hi, r4, r4, 60}, true, hi, "hi r4 r4 60", "hi_r4_r4_60"},
127 {{ls, r4, r4, 225}, true, ls, "ls r4 r4 225", "ls_r4_r4_225"}
[all...] |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3.cc | 129 {{al, r0, r4, 0}, false, al, "al r0 r4 0", "al_r0_r4_0"},
130 {{al, r0, r4, 1}, false, al, "al r0 r4 1", "al_r0_r4_1"},
131 {{al, r0, r4, 2}, false, al, "al r0 r4 2", "al_r0_r4_2"},
132 {{al, r0, r4, 3}, false, al, "al r0 r4 3", "al_r0_r4_3"},
133 {{al, r0, r4, 4}, false, al, "al r0 r4 4", "al_r0_r4_4"}
[all...] |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8.cc | [all...] |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3-in-it-block.cc | 104 {{eq, r3, r4, 5}, true, eq, "eq r3 r4 5", "eq_r3_r4_5"},
105 {{lt, r4, r5, 7}, true, lt, "lt r4 r5 7", "lt_r4_r5_7"},
108 {{le, r4, r1, 0}, true, le, "le r4 r1 0", "le_r4_r1_0"},
113 {{eq, r3, r4, 4}, true, eq, "eq r3 r4 4", "eq_r3_r4_4"},
129 {{hi, r4, r7, 6}, true, hi, "hi r4 r7 6", "hi_r4_r7_6"}
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| muldi3.S | 20 stmfd sp!, {r4, r5, r6, r7, lr}
24 mov r4, r0, lsr #16
28 mul ip, r4, ip
34 str r4, [sp, #4]
35 add r4, lr, ip, asl #16
38 add r10, ip, r4, lsr #16
40 and lr, r4, r11
41 add r4, lr, ip, asl #16
47 mov r10, r4
50 mov r0, r4
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/ |
| sh2a-or-sh4.s | 25 fmov xd4,@r4 ;!/* 1111nnnnmmm11010 fmov <DX_REG_M>,@<REG_N>*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}
27 fmov xd4,@-r4 ;!/* 1111nnnnmmm11011 fmov <DX_REG_M>,@-<REG_N>*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}
29 fmov xd4,@(R0,r4) ;!/* 1111nnnnmmm10111 fmov <DX_REG_M>,@(R0,<REG_N>)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}
31 fmov.d xd4,@r4 ;!/* 1111nnnnmmm11010 fmov.d <DX_REG_M>,@<REG_N>*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}
33 fmov.d xd4,@-r4 ;!/* 1111nnnnmmm11011 fmov.d <DX_REG_M>,@-<REG_N>*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}
35 fmov.d xd4,@(R0,r4) ;!/* 1111nnnnmmm10111 fmov.d <DX_REG_M>,@(R0,<REG_N>)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}
44 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
45 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
46 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
47 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N (…)
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/ |
| sh2a-or-sh4.s | 25 fmov xd4,@r4 ;!/* 1111nnnnmmm11010 fmov <DX_REG_M>,@<REG_N>*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}
27 fmov xd4,@-r4 ;!/* 1111nnnnmmm11011 fmov <DX_REG_M>,@-<REG_N>*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}
29 fmov xd4,@(R0,r4) ;!/* 1111nnnnmmm10111 fmov <DX_REG_M>,@(R0,<REG_N>)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}
31 fmov.d xd4,@r4 ;!/* 1111nnnnmmm11010 fmov.d <DX_REG_M>,@<REG_N>*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2a_or_sh4_up}
33 fmov.d xd4,@-r4 ;!/* 1111nnnnmmm11011 fmov.d <DX_REG_M>,@-<REG_N>*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2a_or_sh4_up}
35 fmov.d xd4,@(R0,r4) ;!/* 1111nnnnmmm10111 fmov.d <DX_REG_M>,@(R0,<REG_N>)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2a_or_sh4_up}
44 add #4,r4 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
45 add r5,r4 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
46 addc r5,r4 ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
47 addv r5,r4 ;!/* 0011nnnnmmmm1111 addv <REG_M>,<REG_N>*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N (…)
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_DeblockLuma_I.S | 30 PUSH {r4-r9,lr}
36 LDR r4,[sp,#0x28]
44 CMPNE r4,#0
46 TST r4,#3
56 POP {r4-r9,pc}
58 STR r4,[sp,#0]
68 ADD r2,r4,#0x10
77 POP {r4-r9,pc}
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/h8300/ |
| addsub.s | 6 adds #1,r4
12 subs #1,r4
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/parse/ |
| procbug.s | 6 divu: stws,ma %r4,4(%r5) ; save registers on stack
13 divu2: stws,ma %r4,4(%r5) ; save registers on stack
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/ |
| movi-1.s | 14 movi localsym + 73,r4
15 movi forwardsym - 42,r4
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-s390/ |
| tlsbin.s | 54 l %r4,0(%r3,%r12):tls_load:bg6
55 la %r5,0(%r4,%r9)
59 l %r4,0(%r3,%r12):tls_load:bl6
60 la %r5,0(%r4,%r9)
64 l %r4,0(%r3,%r12):tls_load:sh6
65 la %r5,0(%r4,%r9)
68 l %r4,.LC4-.LT1(%r13)
69 la %r5,0(%r4,%r9)
|
