| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| scale_sig_opt.s | 32 STMFD r13!, {r4 - r12, r14}
37 ADD r4, r0, r3, LSL #1 @x[i] address
44 LDRSH r5, [r4] @load x[i]
51 STRH r12, [r4], #-2
57 LDRSH r5, [r4] @load x[i]
63 STRH r12, [r4], #-2
67 LDMFD r13!, {r4 - r12, r15}
|
| Filt_6k_7k_opt.s | 36 STMFD r13!, {r4 - r12, r14}
39 MOV r4, r1 @ copy lg address
87 @ not use registers: r4, r10, r12, r14, r5
88 MOV r4, r13
93 LDRSH r1, [r4] @ load x[i]
94 LDRSH r2, [r4, #60] @ load x[i + 30]
95 LDRSH r6, [r4, #2] @ load x[i + 1]
96 LDRSH r7, [r4, #58] @ load x[i + 29]
99 LDRSH r8, [r4, #4] @ load x[i + 2]
100 LDRSH r9, [r4, #56] @ load x[i + 28
[all...] |
| pred_lt4_1_opt.s | 39 STMFD r13!, {r4 - r12, r14}
40 RSB r4, r1, #0 @-T0
42 ADD r5, r0, r4, LSL #1 @x = exc - T0
47 RSB r4, r2, #3 @k = 3 - frac
52 MOV r8, r4, LSL #6
66 LDRSH r4, [r1], #2 @x[0]
70 SMULBB r10, r4, r3 @x[0] * h[0]
74 LDRSH r4, [r1], #2 @x[3]
77 SMLABT r12, r4, r3, r12 @x[3] * h[1]
82 SMLABB r11, r4, r3, r11 @x[3] * h[2
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| operand-err-1.s | 6 add.w r3,r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
7 add.w 42,r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
8 add.w [r3],r4,r5 ; Not an error: [r3] implies [r3+0].
9 add.w r3,[r3],r4 ; { dg-error "(Illegal|Invalid) operands" }
11 test.w [r3],r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
12 test.d [r3],r4 ; { dg-error "(Illegal|Invalid) operands" }
13 move.d [r3],r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
34 test.d [r3+r4] ; { dg-error "(Illegal|Invalid) operands" }
35 test.d [r3=r2+[r4]] ; { dg-error "(Illegal|Invalid) operands" }
36 test.d [r3=r2+[r4].w ; { dg-error "(Illegal|Invalid) operands"
[all...] |
| /external/libavc/encoder/arm/ |
| ih264e_fmt_conv.s | 69 stmfd sp!, {r4-r12, lr}
71 ldr r4, [sp, #72] @// Load convert_uv_only
73 cmp r4, #1
77 ldr r4, [sp, #44] @// Load u2_height from stack
111 subs r4, r4, #1
118 ldr r4, [sp, #44] @// Load u2_height from stack
132 mov r4, r4, lsr #1
168 subs r4, r4, #
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-s390/ |
| tlsbinpic_64.s | 80 sllg %r9,%r4,32
113 lg %r4,.LC8-.LT1(%r13)
114 la %r5,0(%r4,%r3)
115 lg %r4,.LC9-.LT1(%r13)
116 la %r5,0(%r4,%r3)
122 lg %r4,.LC11-.LT1(%r13)
123 la %r5,0(%r4,%r3)
124 lg %r4,.LC12-.LT1(%r13)
125 la %r5,0(%r4,%r3)
134 lg %r4,0(%r3,%r12):tls_load:sg
[all...] |
| tlsbin_64.s | 46 sllg %r9,%r4,32
56 lg %r4,0(%r3,%r12):tls_load:bg6
57 la %r5,0(%r4,%r9)
61 lg %r4,0(%r3,%r12):tls_load:bl6
62 la %r5,0(%r4,%r9)
66 lg %r4,0(%r3,%r12):tls_load:sh6
67 la %r5,0(%r4,%r9)
70 lg %r4,.LC4-.LT1(%r13)
71 la %r5,0(%r4,%r9)
|
| tlspic1_64.s | 91 sllg %r9,%r4,32
140 lg %r4,.LC11-.LT1(%r13)
141 la %r5,0(%r4,%r3)
142 lg %r4,.LC12-.LT1(%r13)
143 la %r5,0(%r4,%r3)
149 lg %r4,.LC14-.LT1(%r13)
150 la %r5,0(%r4,%r3)
151 lg %r4,.LC15-.LT1(%r13)
152 la %r5,0(%r4,%r3)
158 lg %r4,.LC17-.LT1(%r13
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | 48 adc r4, r5, r6
50 adc r4, r5, r6, lsl #1
51 adc r4, r5, r6, lsl #31
52 adc r4, r5, r6, lsr #1
53 adc r4, r5, r6, lsr #31
54 adc r4, r5, r6, lsr #32
55 adc r4, r5, r6, asr #1
56 adc r4, r5, r6, asr #31
57 adc r4, r5, r6, asr #32
58 adc r4, r5, r6, ror #
[all...] |
| /external/v8/src/ppc/ |
| interface-descriptors-ppc.cc | 16 const Register default_stub_registers[] = {r3, r4, r5, r6, r7};
24 return r4;
28 const Register LoadDescriptor::ReceiverRegister() { return r4; }
36 const Register StoreDescriptor::ReceiverRegister() { return r4; }
47 const Register StringCompareDescriptor::LeftRegister() { return r4; }
66 Register registers[] = {r4, r5, r6};
83 Register registers[] = {r6, r5, r4, r3};
90 Register registers[] = {r6, r5, r4};
97 Register registers[] = {r6, r5, r4, r3};
111 Register registers[] = {r5, r6, r4};
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| R4R8First_v5.s | 28 stmdb sp!, {r4 - r11, lr}
37 ldrd r4, [r11, #16]
46 add r2, r4, r6
49 sub r4, r4, r6
59 sub r3, r1, r4
62 add r1, r1, r4
74 ldmia sp!, {r4 - r11, pc}
81 stmdb sp!, {r4 - r11, lr}
92 ldrd r4, [r14, #16
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-rd-rn-rm-a32.cc | 108 {{r4, r5, r10}, false, al, "r4 r5 r10", "r4_r5_r10"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
139 {{r4, r3, r5}, false, al, "r4 r3 r5", "r4_r3_r5"},
142 {{r4, r3, r7}, false, al, "r4 r3 r7", "r4_r3_r7"}
[all...] |
| test-assembler-rd-rn-rm-t32.cc | 108 {{r4, r5, r10}, false, al, "r4 r5 r10", "r4_r5_r10"},
117 {{r4, r10, r12}, false, al, "r4 r10 r12", "r4_r10_r12"},
122 {{r12, r8, r4}, false, al, "r12 r8 r4", "r12_r8_r4"},
139 {{r4, r3, r5}, false, al, "r4 r3 r5", "r4_r3_r5"},
142 {{r4, r3, r7}, false, al, "r4 r3 r7", "r4_r3_r7"}
[all...] |
| test-macro-assembler-cond-rd-rn-a32.cc | 102 {{pl, r4, r12}, "pl, r4, r12", "pl_r4_r12"},
104 {{ne, r8, r4}, "ne, r8, r4", "ne_r8_r4"},
106 {{cc, r4, r10}, "cc, r4, r10", "cc_r4_r10"},
112 {{ls, r4, r8}, "ls, r4, r8", "ls_r4_r8"},
144 {{vs, r4, r11}, "vs, r4, r11", "vs_r4_r11"}
[all...] |
| test-macro-assembler-cond-rd-rn-t32.cc | 102 {{pl, r4, r12}, "pl, r4, r12", "pl_r4_r12"},
104 {{ne, r8, r4}, "ne, r8, r4", "ne_r8_r4"},
106 {{cc, r4, r10}, "cc, r4, r10", "cc_r4_r10"},
112 {{ls, r4, r8}, "ls, r4, r8", "ls_r4_r8"},
144 {{vs, r4, r11}, "vs, r4, r11", "vs_r4_r11"}
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| memcpy4.asm | 29 stmdb sp!, {r4, lr}
33 ldmcsia r1!, {r3, r4, ip, lr}
34 stmcsia r0!, {r3, r4, ip, lr}
35 ldmcsia r1!, {r3, r4, ip, lr}
36 stmcsia r0!, {r3, r4, ip, lr}
41 ldmcsia r1!, {r3, r4, ip, lr}
42 stmcsia r0!, {r3, r4, ip, lr}
43 ldmmiia r1!, {r3, r4}
44 stmmiia r0!, {r3, r4}
45 ldmia sp!, {r4, lr}
[all...] |
| moddi3.S | 20 stmfd sp!, {r4, r5, r7, lr}
21 mov r4, r1, asr #31
26 mov r5, r4
28 eor r0, r0, r4
29 eor r1, r1, r4
33 subs r0, r0, r4
40 eor r0, r0, r4
41 eor r1, r1, r4
42 subs r0, r0, r4
46 ldmfd sp!, {r4, r5, r7, pc}
[all...] |
| /external/compiler-rt/lib/builtins/arm/ |
| divsi3.S | 18 push {r4, r7, lr} ;\
21 pop {r4, r7, pc}
52 eor r4, r0, r1
61 eor r0, r0, r4, asr #31
62 sub r0, r0, r4, asr #31
|
| modsi3.S | 18 push {r4, r7, lr} ;\
21 pop {r4, r7, pc}
50 mov r4, r0
59 eor r0, r0, r4, asr #31
60 sub r0, r0, r4, asr #31
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| xscale.s | 7 miaph acc0, r2, r4
18 mra r3, r4, acc0
24 pld [r4, -r5, lsl #5]
28 ldrltd r4, [r5, -r6]
32 strvcd r4, [r6], r8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| dv-imply.d | 10 0: 3c 20 08 00 00 24 \[MFB\] \(p01\) mov r4=2
13 10: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
16 20: 1c 20 08 00 00 24 \[MFB\] mov r4=2
19 30: 3d 20 1c 00 00 24 \[MFB\] \(p01\) mov r4=7
23 46: 40 10 00 00 48 00 \(p01\) mov r4=2
28 60: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
33 7c: 20 00 00 90 \(p01\) mov r4=2
37 90: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
41 a6: 40 10 00 00 c8 01 \(p01\) mov r4=2
43 b0: 1d 20 1c 00 00 24 \[MFB\] mov r4=
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/z8k/ |
| inout.s | 10 in r12,@r4
18 in r4,@r12
27 inb rh4,@r4
44 ind @r4,@r11,r0
45 ind @r5,@r10,r4
51 ind @r11,@r4,r13
61 indb @r4,@r11,r0
62 indb @r5,@r10,r4
68 indb @r11,@r4,r13
78 indr @r4,@r11,r
[all...] |
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| pitch_filter_armv6.S | 33 push {r4-r11}
44 add r4, r7, r0
45 str r4, [r6] @ Store return value to index2.
51 add r4, r7, #PITCH_BUFFSIZE @ *index2 + PITCH_BUFFSIZE
52 add r6, r3, r4, lsl #1 @ &outputBuf2[*index2 + PITCH_BUFFSIZE]
53 sub r4, r2 @ r2: index
54 sub r4, #2 @ *index2 + PITCH_BUFFSIZE - index - 2
55 add r3, r4, lsl #1 @ &ubufQQpos2[*index2]
68 @ r4, r5, r7, r10, r11: scratch
74 ldr r4, [r9], #4 @ coefficient[0, 1
[all...] |
| /external/llvm/test/MC/ARM/ |
| eh-directive-save.s | 112 .save {r4}
113 push {r4}
114 pop {r4}
125 .save {r4, r5}
126 push {r4, r5}
127 pop {r4, r5}
138 .save {r4, r5, r6, r7, r8, r9, r10, r11}
139 push {r4, r5, r6, r7, r8, r9, r10, r11}
140 pop {r4, r5, r6, r7, r8, r9, r10, r11}
168 .save {r4, r14
[all...] |
| /bionic/libc/arch-arm/cortex-a15/bionic/ |
| __strcat_chk.S | 49 push {r4, r5}
51 .cfi_rel_offset r4, 0
59 // Zero out r4
60 eor r4, r4, r4
164 cmp r4, #0
174 add r4, r3, #1
179 // r4 holds the src string length + 1.
181 add r2, r3, r4
[all...] |
