| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-m.s | 5 ld1 r4 = [r5], r6
8 ld1.nt1 r4 = [r5], r6
11 ld1.nta r4 = [r5], r6
15 ld1.s r4 = [r5], r6
18 ld1.s.nt1 r4 = [r5], r6
21 ld1.s.nta r4 = [r5], r6
25 ld1.a r4 = [r5], r6
28 ld1.a.nt1 r4 = [r5], r6
31 ld1.a.nta r4 = [r5], r6
35 ld1.sa r4 = [r5], r6
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| vector2.s | 14 r6.h=r6.l=sign(r7.h)*r0.h+sign(r7.l)*r0.l ;
16 r4.h=r4.l=sign(r5.h)*r6.h+sign(r5.l)*r6.l ;
31 r6 = vit_max(r7, r0)(asl) ; /* shift left, dual operation */ define
33 r4 = vit_max(r5, r6)(asl) ; /* shift left, dual operation */
36 r5 = vit_max (r6, r7) (asr) ; /* shift right, dual operation */
45 r6.l = vit_max (r7)(asr) ; /* shift right, single operation */
48 r5.l = vit_max (r6)(asl) ; /* shift left, single operation */
58 r6 = abs r7 (v) define
[all...] |
| /external/webrtc/webrtc/common_audio/signal_processing/ |
| filter_ar_fast_q12_armv7.S | 30 @ r6: Calculated value for output data_out[]; interation counter for inner loop
58 subs r6, r3, #3 @ Iteration counter for inner loop.
64 subs r6, #2
85 smulbb r6, r10, r9 @ output1 = coefficients[0] * data_in[i];
86 sub r6, r7 @ output1 -= sum1;
88 sbfx r11, r6, #12, #16
89 ssat r7, #16, r6, asr #12
91 addeq r6, r6, #2048
92 ssat r6, #16, r6, asr #1
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| band_nrg_v5.s | 51 ldr r6, [r0, +r10, lsl #2]
54 smull r6, r8, r6, r6
59 ldr r6, [r0, +r10, lsl #2]
61 smull r6, r8, r6, r6
99 mov r6, #0
129 qadd r6, r6, r
[all...] |
| AutoCorrelation_v5.s | 49 ldr r6, [r5, r2]
51 smulbb r3, r6, r6
53 smultt r10, r6, r6
55 smulbb r6, r1, r1
61 mov r6, r6, asr #9
64 qadd r0, r0, r6
66 smultt r6, r1, r
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| prefix.d | 9 [ ]+4:[ ]+0031 564e[ ]+move\.w \[\$?r6=\$?r3\+0\],\$?r4
11 [ ]+c:[ ]+ff01 564e[ ]+move\.w \[\$?r6=\$?r0-1\],\$?r4
13 [ ]+14:[ ]+8071 564e[ ]+move\.w \[\$?r6=\$?r7-128\],\$?r4
18 [ ]+2c:[ ]+4f6d ffff 679e[ ]+move\.d \[\$?r7=\$?r6-1\],\$?r9
19 [ ]+32:[ ]+4f6d 80ff 679a[ ]+move\.d \[\$?r6-128\],\$?r9
20 [ ]+38:[ ]+4f6d 7f00 564e[ ]+move\.w \[\$?r6=\$?r6\+127\],\$?r4
23 [ ]+4a:[ ]+5f6d ffff 679e[ ]+move\.d \[\$?r7=\$?r6-1\],\$?r9
24 [ ]+50:[ ]+5f6d 80ff 679a[ ]+move\.d \[\$?r6-128\],\$?r9
25 [ ]+56:[ ]+5f6d 7f00 564e[ ]+move\.w \[\$?r6=\$?r6\+127\],\$?r
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Syn_filt_32_opt.s | 34 @ lg --- r6
45 LDRSH r6, [r0] @ load Aq[0]
47 MOV r3, r6, ASR r7 @ a0 = Aq[0] >> (4 + Q_new)
50 LDRSH r6, [r0, #2] @ load Aq[1]
54 AND r6, r6, r14
56 ORR r10, r6, r7, LSL #16 @ Aq[2] -- Aq[1]
61 LDRSH r6, [r0, #10] @ load Aq[5]
65 AND r6, r6, r1
[all...] |
| pred_lt4_1_opt.s | 50 LDR r6, [r8]
51 ADD r6, r8
54 ADD r8, r6, r8 @ptr2 = &(inter4_2[k][0])
67 LDRSH r6, [r1], #2 @x[1]
71 SMULBB r11, r6, r3 @x[1] * h[0]
75 SMLABT r10, r6, r3, r10 @x[1] * h[1]
80 LDRSH r6, [r1], #2 @x[4]
83 SMLABB r12, r6, r3, r12 @x[4] * h[2]
87 SMLABT r11, r6, r3, r11 @x[4] * h[3]
92 SMLABB r10, r6, r3, r10 @x[4] * h[4
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-rn-t32-low-registers-in-it-block.cc | 101 {{eq, r0, r6}, true, eq, "eq r0 r6", "eq_r0_r6"},
109 {{eq, r1, r6}, true, eq, "eq r1 r6", "eq_r1_r6"},
117 {{eq, r2, r6}, true, eq, "eq r2 r6", "eq_r2_r6"},
125 {{eq, r3, r6}, true, eq, "eq r3 r6", "eq_r3_r6"},
133 {{eq, r4, r6}, true, eq, "eq r4 r6", "eq_r4_r6"}
[all...] |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-zero-in-it-block.cc | 101 {{eq, r0, r6, 0}, true, eq, "eq r0 r6 0", "eq_r0_r6_0"},
109 {{eq, r1, r6, 0}, true, eq, "eq r1 r6 0", "eq_r1_r6_0"},
117 {{eq, r2, r6, 0}, true, eq, "eq r2 r6 0", "eq_r2_r6_0"},
125 {{eq, r3, r6, 0}, true, eq, "eq r3 r6 0", "eq_r3_r6_0"},
133 {{eq, r4, r6, 0}, true, eq, "eq r4 r6 0", "eq_r4_r6_0"}
[all...] |
| test-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8-in-it-block.cc | 98 {{vc, r6, r6, 138}, true, vc, "vc r6 r6 138", "vc_r6_r6_138"},
100 {{ge, r6, r6, 181}, true, ge, "ge r6 r6 181", "ge_r6_r6_181"},
108 {{le, r6, r6, 39}, true, le, "le r6 r6 39", "le_r6_r6_39"}
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32-in-it-block.cc | 96 {{{ge, r7, r6, LSR, 20}, true, ge, "ge r7 r6 LSR 20", "ge_r7_r6_LSR_20"},
97 {{gt, r4, r6, LSR, 32}, true, gt, "gt r4 r6 LSR 32", "gt_r4_r6_LSR_32"},
98 {{hi, r6, r7, LSR, 29}, true, hi, "hi r6 r7 LSR 29", "hi_r6_r7_LSR_29"},
100 {{ls, r7, r6, LSR, 14}, true, ls, "ls r7 r6 LSR 14", "ls_r7_r6_LSR_14"},
106 {{gt, r6, r4, LSR, 13}, true, gt, "gt r6 r4 LSR 13", "gt_r6_r4_LSR_13"}
[all...] |
| test-assembler-rd-rn-rm-a32.cc | 109 {{r13, r6, r8}, false, al, "r13 r6 r8", "r13_r6_r8"},
113 {{r6, r0, r7}, false, al, "r6 r0 r7", "r6_r0_r7"},
121 {{r12, r2, r6}, false, al, "r12 r2 r6", "r12_r2_r6"},
124 {{r6, r3, r11}, false, al, "r6 r3 r11", "r6_r3_r11"},
130 {{r6, r5, r7}, false, al, "r6 r5 r7", "r6_r5_r7"}
[all...] |
| test-assembler-rd-rn-rm-t32.cc | 109 {{r13, r6, r8}, false, al, "r13 r6 r8", "r13_r6_r8"},
113 {{r6, r0, r7}, false, al, "r6 r0 r7", "r6_r0_r7"},
121 {{r12, r2, r6}, false, al, "r12 r2 r6", "r12_r2_r6"},
124 {{r6, r3, r11}, false, al, "r6 r3 r11", "r6_r3_r11"},
130 {{r6, r5, r7}, false, al, "r6 r5 r7", "r6_r5_r7"}
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/dlx/ |
| rtype.d | 15 14: 00 c7 28 05 mult r5,r6,r7
28 48: 00 a6 38 2b sgt r7,r5,r6
29 4c: 00 a6 38 2c sle r7,r5,r6
30 50: 00 a6 38 2d sge r7,r5,r6
34 60: 00 a6 38 2b sgt r7,r5,r6
35 64: 00 a6 38 2c sle r7,r5,r6
36 68: 00 a6 38 2d sge r7,r5,r6
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| uldiv.S | 30 stmdb sp!, {r4, r5, r6, lr}
33 mov r6, #0 // 0x0
39 addeq r6, r6, #16 // 0x10
40 mov ip, r2, lsl r6
43 addeq r6, r6, #8 // 0x8
46 addeq r6, r6, #4 // 0x4
49 addeq r6, r6, #2 // 0x2
[all...] |
| uldiv.asm | 29 stmdb sp!, {r4, r5, r6, lr}
32 mov r6, #0 ; 0x0
38 addeq r6, r6, #16 ; 0x10
39 mov ip, r2, lsl r6
42 addeq r6, r6, #8 ; 0x8
45 addeq r6, r6, #4 ; 0x4
48 addeq r6, r6, #2 ; 0x2
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| mul_test.s | 19 mulb r5,r6
20 mulb r6,r7
37 mulw r5,r6
38 mulw r6,r7
45 mulsb r5,r6
53 mulsw r5,(r6,r5)
64 macsw r4,r5,(r7,r6)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
| inst.s | 195 ld2h r6,@(r7,r8)
196 ld2h r6,@(r7+,r8)
197 ld2h r6,@(r7-,r8)
198 ld2h r6,@(r7,0x1a)
199 ld2h r6,@(r7,0x1234)
201 ld2w r6,@(r7,r8)
202 ld2w r6,@(r7+,r8)
203 ld2w r6,@(r7-,r8)
204 ld2w r6,@(r7,0x1a)
205 ld2w r6,@(r7,0x1234
[all...] |
| opt.s | 48 add r3, r3, r6
85 ld2w r4,@(r0,r6)
89 ld2w r4,@(r0,r6)
92 # parallel even though ld2w uses r6 and adds changes it
93 ld2w r4,@(r0,r6)
94 adds r6,r19,r20
97 ld2w r4,@(r0,r6)
101 ld2w r4,@(r0,r6)
105 st2w r4,@(r0,r6)
109 st2w r4,@(r0,r6)
[all...] |
| /external/tremolo/Tremolo/ |
| mdctLARM.s | 61 LDMDB r2!,{r5,r6,r7,r12}
64 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9
78 MOV r14,r6, ASR #15
80 EORNE r6, r4, r14,ASR #31
81 STRH r6, [r0], r3
123 LDR r6, [r2],#8
128 RSB r6, r6, #
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | 48 adc r4, r5, r6
50 adc r4, r5, r6, lsl #1
51 adc r4, r5, r6, lsl #31
52 adc r4, r5, r6, lsr #1
53 adc r4, r5, r6, lsr #31
54 adc r4, r5, r6, lsr #32
55 adc r4, r5, r6, asr #1
56 adc r4, r5, r6, asr #31
57 adc r4, r5, r6, asr #32
58 adc r4, r5, r6, ror #
[all...] |
| /device/linaro/hikey/l-loader/ |
| start.S | 47 ldr r6, =LLOADER_BL1_BIN
48 mov r6, r6, lsr #2
49 str r6, [r4, r5]
52 cmp r0, r6
56 mov r6, #CPU7_CTRL_OFFSET
64 cmp r5, r6
87 ldr r6, =SC_PERIPH_CLKEN3 @ enable PCLK
90 str r0, [r4, r6]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/z8k/ |
| inout.s | 12 in r14,@r6
20 in r6,@r14
29 inb rh6,@r6
42 ind @r2,@r13,r6
46 ind @r6,@r9,r3
49 ind @r9,@r6,r15
59 indb @r2,@r13,r6
63 indb @r6,@r9,r3
66 indb @r9,@r6,r15
76 indr @r2,@r13,r6
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Arm/ |
| Math64.S | 25 stmfd sp!, {r4, r5, r6}
26 mov r6, r1
28 mov r4, r6, asl r2
36 ldmfd sp!, {r4, r5, r6}
43 stmfd sp!, {r4, r5, r6}
51 mov r6, r1
54 ldmfd sp!, {r4, r5, r6}
61 stmfd sp!, {r4, r5, r6}
69 mov r6, r1
72 ldmfd sp!, {r4, r5, r6}
[all...] |
