| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| tbitb_test.s | 18 tbitb $3,[r12]0xa7a(r6,r5)
19 tbitb $3,[r12]0xa7a(r7,r6)
26 tbitb $3,[r13]0xa7a(r6,r5)
27 tbitb $3,[r13]0xa7a(r7,r6)
31 tbitb $1,[r12]0x17a(r6,r5)
32 tbitb $1,[r13]0x134(r6,r5)
35 tbitb $3,[r12]0xabcd(r6,r5)
36 tbitb $3,[r13]0xbcde(r6,r5)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| shexpr-1.d | 7 [ ]+0:[ ]+6f6e 286f ff0b[ ]+move\.d bff6f28 <start\+0xbff6f28>,\$?r6
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/ |
| list_insn.d | 14 6: 7f 34 ff 00 pushx r15, {r0,r1,r2,r3,r4,r5,r6,r7}
15 a: 76 34 00 00 pushx r6, {lo,hi}
22 14: 7f 32 fb 00 popx r15, {r0,r1,r3,r4,r5,r6,r7}
30 22: 40 32 42 00 loadm r0, {r1,r6}
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| index.s | 10 ld8 r6 = [zero]
17 mov r6 = cpuid[zero]
24 mov r6 = b0[zero]
31 mov r6 = xyz[zero]
41 mov r6 = reg[zero]
48 mov r6 = cpuid[zero]
55 mov r6 = b0[zero]
62 mov r6 = xyz[zero]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/ |
| nor.d | 9 0+0000 <[^>]*> 428c303a nor r6,r8,r10
|
| /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/ |
| pvmp3_mdct_18_gcc.s | 47 mov r6,r1
143 ldr r3,[r6,r4,lsl #2]
153 str r2,[r6,r4,lsl #2]
161 ldr r2,[r6,#0x18]
170 ldr r2,[r6,#0x1c]
172 str r3,[r6,#0x18]
176 str r0,[r6,#0x1c]
178 ldr r0,[r6,#0x20]
189 str r1,[r6,#0x20]
195 ldr r3,[r6,#0x24
[all...] |
| /external/vixl/test/aarch32/ |
| test-macro-assembler-cond-rd-rn-a32.cc | 95 {{hi, r6, r12}, "hi, r6, r12", "hi_r6_r12"},
100 {{gt, r8, r6}, "gt, r8, r6", "gt_r8_r6"},
110 {{hi, r6, r0}, "hi, r6, r0", "hi_r6_r0"},
117 {{lt, r10, r6}, "lt, r10, r6", "lt_r10_r6"},
120 {{pl, r10, r6}, "pl, r10, r6", "pl_r10_r6"}
[all...] |
| test-macro-assembler-cond-rd-rn-t32.cc | 95 {{hi, r6, r12}, "hi, r6, r12", "hi_r6_r12"},
100 {{gt, r8, r6}, "gt, r8, r6", "gt_r8_r6"},
110 {{hi, r6, r0}, "hi, r6, r0", "hi_r6_r0"},
117 {{lt, r10, r6}, "lt, r10, r6", "lt_r10_r6"},
120 {{pl, r10, r6}, "pl, r10, r6", "pl_r10_r6"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32-rd-is-rn-in-it-block.cc | 98 {{ls, r7, r7, r6}, true, ls, "ls r7 r7 r6", "ls_r7_r7_r6"},
101 {{le, r6, r6, r11}, true, le, "le r6 r6 r11", "le_r6_r6_r11"},
129 {{cc, r0, r0, r6}, true, cc, "cc r0 r0 r6", "cc_r0_r0_r6"},
130 {{gt, r4, r4, r6}, true, gt, "gt r4 r4 r6", "gt_r4_r4_r6"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 116 const TestData kTests[] = {{{al, r6, r8, r10, LSL, r12},
119 "al r6 r8 r10 LSL r12",
121 {{hi, r5, r13, r6, LSL, r4},
124 "hi r5 r13 r6 LSL r4",
136 {{eq, r9, r7, r6, LSL, r1},
139 "eq r9 r7 r6 LSL r1",
161 {{le, r10, r1, r1, LSL, r6},
164 "le r10 r1 r1 LSL r6",
176 {{le, r14, r6, r7, ASR, r1},
179 "le r14 r6 r7 ASR r1"
[all...] |
| test-assembler-cond-rd-rn-rm-a32.cc | 154 {{pl, r8, r6, r2}, false, al, "pl r8 r6 r2", "pl_r8_r6_r2"},
157 {{lt, r4, r6, r3}, false, al, "lt r4 r6 r3", "lt_r4_r6_r3"},
158 {{le, r11, r6, r2}, false, al, "le r11 r6 r2", "le_r11_r6_r2"},
160 {{le, r5, r14, r6}, false, al, "le r5 r14 r6", "le_r5_r14_r6"},
161 {{lt, r6, r1, r0}, false, al, "lt r6 r1 r0", "lt_r6_r1_r0"}
[all...] |
| test-assembler-cond-rdlow-operand-imm8-t32.cc | [all...] |
| /external/sonivox/arm-wt-22k/lib_src/ |
| ARM-E_mastergain_gnu.s | 68 STMFD sp!,{r4-r6,r14} @Save any save-on-entry registers that are used
70 LDR r6, =0x7fff @constant for saturation tests
79 CMP r4, r6 @check for positive saturation
80 MOVGT r4, r6 @saturate
81 CMN r4, r6 @check for negative saturation
82 MVNLT r4, r6 @saturate
88 CMP r5, r6 @check for positive saturation
89 MOVGT r5, r6 @saturate
90 CMN r5, r6 @check for negative saturation
91 MVNLT r5, r6 @saturate
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| syn_filt_opt.s | 47 LDRH r6, [r4], #2
56 STRH r6, [r5], #2
65 LDRH r6, [r4], #2
74 STRH r6, [r5], #2
90 LDRSH r6, [r0, #2] @ load a[1]
94 AND r6, r6, r14
96 ORR r10, r6, r7, LSL #16 @ -a[2] -- -a[1]
101 LDRSH r6, [r0, #10] @ load a[5]
105 AND r6, r6, r1
[all...] |
| Filt_6k_7k_opt.s | 53 ADD r6, r13, #60 @ get x[L_FIR - 1] address
64 STRH r8, [r6], #2
65 STRH r9, [r6], #2
66 STRH r11, [r6], #2
67 STRH r12, [r6], #2
76 STRH r8, [r6], #2
77 STRH r9, [r6], #2
78 STRH r11, [r6], #2
79 STRH r12, [r6], #2
95 LDRSH r6, [r4, #2] @ load x[i + 1
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_chroma_copy.s | 93 @ r6 => wd
130 add r6,r1,r3 @pu1_dst_tmp += dst_strd
134 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
137 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
140 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
146 sub r1,r6,r11 @pu1_dst = pu1_dst_tmp
162 add r6,r1,r3 @pu1_dst_tmp += dst_strd
166 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
184 add r6,r1,r3 @pu1_dst_tmp += dst_strd
187 vst1.8 {d1},[r6],r3 @vst1_u8(pu1_dst_tmp, tmp_src
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
| inst.d | 120 370: 043061c8 843461c8 ld2h.s r6, @\(r7, r8\) -> ld2h.s r6, @\(r7\+, r8\)
121 378: 043c61c8 843861da ld2h.s r6, @\(r7-, r8\) -> ld2h.s r6, @\(r7, 0x1a\)
122 380: 843861c0 80001234 ld2h.l r6, @\(r7, 0x1234\)
123 388: 046061c8 846461c8 ld2w.s r6, @\(r7, r8\) -> ld2w.s r6, @\(r7\+, r8\)
124 390: 046c61c8 846861da ld2w.s r6, @\(r7-, r8\) -> ld2w.s r6, @\(r7, 0x1a\)
125 398: 846861c0 80001234 ld2w.l r6, @\(r7, 0x1234\
[all...] |
| /external/llvm/test/MC/ARM/ |
| eh-directive-save-diagnostics.s | 18 .save {r4, r5, r6, r7}
20 @ CHECK: .save {r4, r5, r6, r7}
37 .save {r4, r5, r6, r7}
39 @ CHECK: .save {r4, r5, r6, r7}
|
| invalid-vector-index.s | 3 ldrd r6, r7 [r2, #15]
|
| thumb2-exception-return-mclass.s | 10 # CHECK-NEXT: rfeia r6
11 rfeia r6
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| archv6m.s | 8 msr apsr_nzcvq,r6
|
| mrs-msr-arm-v6.d | 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
16 0+20 <[^>]*> e169f006 msr SPSR_fc, r6
|
| mrs-msr-arm-v7-a.d | 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
16 0+20 <[^>]*> e169f006 msr SPSR_fc, r6
|
| mrs-msr-thumb-v6t2.d | 12 0+08 <[^>]*> f3ff 8600 mrs r6, SPSR
15 0+14 <[^>]*> f396 8900 msr SPSR_fc, r6
|
| thumbv6.s | 11 revsh r3, r6
17 uxtb r5, r6
|
