| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/xgate/ |
| all_insns.s | 6 L2: add r4, r5, r6
17 L13: andh r6, #255
24 L20: bffo r6, r7
27 L23: bfinsx r6, r7, r0
48 L44: cpc r6, r7
53 L49: csl r6, #11
58 L54: ldb r5, (r6, #20)
66 L62: ldw r5, (r6, r7+)
67 L63: ldw r5, (r6, -r7)
72 L68: lsr r5, r6
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_chroma_vert.s | 112 ldr r6,[sp,#48] @loads wd
118 tst r6,#3 @checks (wd & 3)
120 lsl r10,r6,#1 @2*wd
139 add r6,r0,r2 @pu1_src +src_strd
140 vld1.8 {d9},[r6],r2 @loads pu1_src
144 vld1.8 {d4},[r6],r2 @loads incremented src
146 vld1.8 {d8},[r6],r2 @loads incremented src
151 vld1.8 {d10},[r6] @loads the incremented src
155 add r6,r1,r3 @pu1_dst + dst_strd
159 vst1.8 {d4},[r6] @stores the loaded valu
[all...] |
| ihevc_inter_pred_chroma_vert_w16out.s | 113 ldr r6,[sp,#48] @loads wd
119 tst r6,#3 @checks (wd & 3)
121 lsl r10,r6,#1 @2*wd
141 add r6,r0,r2 @pu1_src +src_strd
142 vld1.8 {d9},[r6],r2 @loads pu1_src
146 vld1.8 {d4},[r6],r2 @loads incremented src
148 vld1.8 {d8},[r6],r2 @loads incremented src
151 vld1.8 {d10},[r6] @loads the incremented src
156 add r6,r1,r3 @pu1_dst + dst_strd
159 vst1.8 {q2},[r6] @stores the loaded valu
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-rn-t32-in-it-block.cc | 102 {{eq, r0, r6}, true, eq, "eq r0 r6", "eq_r0_r6"},
117 {{eq, r1, r6}, true, eq, "eq r1 r6", "eq_r1_r6"},
132 {{eq, r2, r6}, true, eq, "eq r2 r6", "eq_r2_r6"},
147 {{eq, r3, r6}, true, eq, "eq r3 r6", "eq_r3_r6"},
162 {{eq, r4, r6}, true, eq, "eq r4 r6", "eq_r4_r6"}
[all...] |
| test-assembler-cond-rd-rn-rm-t32.cc | 157 {{al, r6, r9, r10}, false, al, "al r6 r9 r10", "al_r6_r9_r10"},
159 {{al, r4, r6, r6}, false, al, "al r4 r6 r6", "al_r4_r6_r6"},
162 {{al, r6, r12, r11}, false, al, "al r6 r12 r11", "al_r6_r12_r11"},
164 {{al, r13, r6, r7}, false, al, "al r13 r6 r7", "al_r13_r6_r7"}
[all...] |
| test-assembler-cond-rd-operand-rn-a32.cc | 112 {{pl, r6, r0}, false, al, "pl r6 r0", "pl_r6_r0"},
113 {{pl, r1, r6}, false, al, "pl r1 r6", "pl_r1_r6"},
125 {{eq, r11, r6}, false, al, "eq r11 r6", "eq_r11_r6"},
127 {{gt, r1, r6}, false, al, "gt r1 r6", "gt_r1_r6"},
130 {{lt, r8, r6}, false, al, "lt r8 r6", "lt_r8_r6"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 127 {{al, r0, r11, r6, ROR, 24},
130 "al r0 r11 r6 ROR 24",
157 {{al, r10, r1, r6, ROR, 8},
160 "al r10 r1 r6 ROR 8",
182 {{al, r6, r5, r9, ROR, 0},
185 "al r6 r5 r9 ROR 0",
187 {{al, r14, r6, r13, ROR, 16},
190 "al r14 r6 r13 ROR 16",
192 {{al, r13, r6, r1, ROR, 16},
195 "al r13 r6 r1 ROR 16"
[all...] |
| /external/lzma/Asm/x86/ |
| AesOpt.asm | 29 push r6
40 pop r6
146 add r1, r6
147 neg r6
148 add r6, 32
154 mov r3, r6
164 movdqa [r1 + r6 - 64], xmm0
191 add r1, r6
192 neg r6
193 add r6, 32
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-i.s | 5 pmpyshr2 r4 = r5, r6, 0
6 pmpyshr2.u r4 = r5, r6, 16
8 pmpy2.r r4 = r5, r6
9 pmpy2.l r4 = r5, r6
11 mix1.r r4 = r5, r6
12 mix2.r r4 = r5, r6
13 mix4.r r4 = r5, r6
14 mix1.l r4 = r5, r6
15 mix2.l r4 = r5, r6
16 mix4.l r4 = r5, r6
[all...] |
| /external/libopus/celt/arm/ |
| celt_pitch_xcorr_arm_gnu.s | 56 @ preserved: r0-r3, r6-r11, d2, q4-q7, q9-q15
171 @ r6 = int max_pitch
174 STMFD sp!, {r4-r6, lr}
175 LDR r6, [sp, #16]
178 SUBS r6, r6, #4
189 SUBS r6, r6, #4
198 ADDS r6, r6, #
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | 68 adc r4, r5, r6
70 adc r4, r5, r6, lsl #1
71 adc r4, r5, r6, lsl #31
72 adc r4, r5, r6, lsr #1
73 adc r4, r5, r6, lsr #31
74 adc r4, r5, r6, lsr #32
75 adc r4, r5, r6, asr #1
76 adc r4, r5, r6, asr #31
77 adc r4, r5, r6, asr #32
78 adc r4, r5, r6, ror #
[all...] |
| /external/tremolo/Tremolo/ |
| mdctARM.s | 63 LDMDB r2!,{r5,r6,r7,r12}
66 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9
80 MOV r14,r6, ASR #15
82 EORNE r6, r4, r14,ASR #31
83 STRH r6, [r0], r3
125 LDR r6, [r2],#8
130 RSB r6, r6, #
[all...] |
| /bionic/libc/arch-arm/generic/bionic/ |
| memcpy.S | 117 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
119 stmcs r0!, {r4, r5, r6, r7}
185 ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
187 stmcs r0!, {r4, r5, r6, r7}
274 ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
282 orr r5, r5, r6, lsl #16
283 mov r6, r6, lsr #16
284 orr r6, r6, r7, lsl #1
[all...] |
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| filters_mips.c | 29 int32_t r4, r5, r6, r7; local
54 "lh %[r6], 12(%[in]) \n\t"
71 "madd %[r6], %[r6] \n\t"
124 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7),
162 "lh %[r6], 6(%[in]) \n\t"
173 "madd %[r6], %[r7] \n\t"
195 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7)
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| convolve_neon.s | 42 MOV r6, r0
43 LDRSH r9, [r6], #2 @ *tmpX++
54 VLD1.S16 D0, [r6]!
74 MOV r6, r0
75 LDRSH r9, [r6], #2 @ *tmpX++
77 LDRSH r12, [r6], #2
90 VLD1.S16 D0, [r6]!
110 MOV r6, r0
111 LDRSH r9, [r6], #2
113 LDRSH r12, [r6], #
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| mul_test.d | 18 16: 56 65 mulb r5,r6
19 18: 67 65 mulb r6,r7
29 32: 56 67 mulw r5,r6
30 34: 67 67 mulw r6,r7
34 3c: 56 0b mulsb r5,r6
39 46: 55 62 mulsw r5,\(r6,r5\)
47 60: 14 00 45 f6 macsw r4,r5,\(r7,r6\)
|
| lpsp_test.s | 13 lpr r6,uspl
30 lprd (r6,r5),dsr
31 lprd (r7,r6),dcr
43 spr uspl,r6
60 sprd dsr,(r6,r5)
61 sprd dcr,(r7,r6)
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| R4R8First_v5.s | 38 ldrd r6, [r11, #24]
46 add r2, r4, r6
49 sub r4, r4, r6
52 add r6, r8, r2
64 strd r6, [r11]
93 ldrd r6, [r14, #24]
101 add r2, r4, r6 @ r2 = buf[4] + buf[6]@
104 sub r4, r4, r6 @ r3 = buf[4] - buf[6]@
107 add r6, r8, r2 @ r4 = (r0 + r2) >> 1@
113 sub r2, r0, r5 @ r6 = (r1 - i3) >> 1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| arch7.s | 5 pli [r6, r8]
26 pli [r6, r8]
47 sdiv r6, r9, r12
48 sdiv r9, r6, r3
49 udiv r9, r6, r3
50 udiv r6, r9, r12
|
| thumb2_invert.d | 10 0+00c <[^>]+> f506 0380 add.w r3, r6, #4194304 ; 0x400000
13 0+018 <[^>]+> f022 4600 bic.w r6, r2, #2147483648 ; 0x80000000
17 0+028 <[^>]+> f062 4600 orn r6, r2, #2147483648 ; 0x80000000
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| rd-v32s-4.d | 11 [ ]+4:[ ]+3626[ ]+move r6,pid
16 [ ]+e:[ ]+3676[ ]+move r6,mof
21 [ ]+18:[ ]+36c6[ ]+move r6,nrp
27 [ ]+24:[ ]+7626[ ]+move pid,r6
32 [ ]+2e:[ ]+7676[ ]+move mof,r6
37 [ ]+38:[ ]+76c6[ ]+move nrp,r6
59 [ ]+a4:[ ]+762a[ ]+move pid,\[r6\]
64 [ ]+ae:[ ]+767a[ ]+move mof,\[r6\]
69 [ ]+b8:[ ]+76ca[ ]+move nrp,\[r6\]
75 [ ]+c4:[ ]+362a[ ]+move \[r6\],pi
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
| bittest.d | 11 8: 04406144 00f00000 ldw.s r6, @\(r5, r4\) || nop
19 48: 02201083 08c04146 bset r1, r2, r3 || joinll.s r4, r5, r6
20 50: 02201083 08c04146 bset r1, r2, r3 || joinll.s r4, r5, r6
|
| opt.d | 25 78: 080030c6 854820c0 add.s r3, r3, r6 -> stw.s r2, @\(r3, 0x0\)
36 d0: 04604006 886054d4 ld2w.s r4, @\(r0, r6\) -> adds.s r5, r19, r20
37 d8: 04604006 88603154 ld2w.s r4, @\(r0, r6\) -> adds.s r3, r5, r20
38 e0: 04604006 086064d4 ld2w.s r4, @\(r0, r6\) || adds.s r6, r19, r20
39 e8: 04604006 086074d4 ld2w.s r4, @\(r0, r6\) || adds.s r7, r19, r20
40 f0: 04604006 08607014 ld2w.s r4, @\(r0, r6\) || adds.s r7, r0, r20
41 f8: 05604006 086054d4 st2w.s r4, @\(r0, r6\) || adds.s r5, r19, r20
42 100: 05604006 08603154 st2w.s r4, @\(r0, r6\) || adds.s r3, r5, r20
43 108: 05604006 086064d4 st2w.s r4, @\(r0, r6\) || adds.s r6, r19, r2
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| power4.d | 55 .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
57 .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
59 .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
61 .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)
63 .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)
65 .*: (e0 c4 00 20|20 00 c4 e0) lq r6,32\(r4\)
66 .*: (f8 c7 00 02|02 00 c7 f8) stq r6,0\(r7\)
67 .*: (f8 c7 00 12|12 00 c7 f8) stq r6,16\(r7\)
68 .*: (f8 c7 ff f2|f2 ff c7 f8) stq r6,-16\(r7\)
69 .*: (f8 c7 80 02|02 80 c7 f8) stq r6,-32768\(r7\
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-xc16x/ |
| absrel.d | 8 402: e0 f6 mov r6,#0xf
12 408: e0 d6 mov r6,#0xd
18 414: e0 f6 mov r6,#0xf
|
