| /art/runtime/interpreter/mterp/x86/ |
| op_add_double.S | 1 %include "x86/sseBinop.S" {"instr":"adds","suff":"d"}
|
| op_add_double_2addr.S | 1 %include "x86/sseBinop2Addr.S" {"instr":"adds","suff":"d"}
|
| op_add_float.S | 1 %include "x86/sseBinop.S" {"instr":"adds","suff":"s"}
|
| op_add_float_2addr.S | 1 %include "x86/sseBinop2Addr.S" {"instr":"adds","suff":"s"}
|
| /art/runtime/interpreter/mterp/x86_64/ |
| op_add_double.S | 1 %include "x86_64/sseBinop.S" {"instr":"adds","suff":"d"}
|
| op_add_double_2addr.S | 1 %include "x86_64/sseBinop2Addr.S" {"instr":"adds","suff":"d"}
|
| op_add_float.S | 1 %include "x86_64/sseBinop.S" {"instr":"adds","suff":"s"}
|
| op_add_float_2addr.S | 1 %include "x86_64/sseBinop2Addr.S" {"instr":"adds","suff":"s"}
|
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3-adds.h | 38 0x00, 0x1c // adds al r0 r0 0
41 0x40, 0x1c // adds al r0 r0 1
44 0x80, 0x1c // adds al r0 r0 2
47 0xc0, 0x1c // adds al r0 r0 3
50 0x00, 0x1d // adds al r0 r0 4
53 0x40, 0x1d // adds al r0 r0 5
56 0x80, 0x1d // adds al r0 r0 6
59 0xc0, 0x1d // adds al r0 r0 7
62 0x08, 0x1c // adds al r0 r1 0
65 0x48, 0x1c // adds al r0 r1
[all...] |
| assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8-adds.h | 38 0x00, 0x1c // adds al r0 r0 0
41 0x40, 0x1c // adds al r0 r0 1
44 0x80, 0x1c // adds al r0 r0 2
47 0xc0, 0x1c // adds al r0 r0 3
50 0x00, 0x1d // adds al r0 r0 4
53 0x40, 0x1d // adds al r0 r0 5
56 0x80, 0x1d // adds al r0 r0 6
59 0xc0, 0x1d // adds al r0 r0 7
62 0x08, 0x30 // adds al r0 r0 8
65 0x09, 0x30 // adds al r0 r0
[all...] |
| assembler-cond-rd-rn-operand-rm-a32-adds.h | 38 0x0e, 0x40, 0x95, 0xd0 // adds le r4 r5 r14
41 0x0a, 0x50, 0x9b, 0xa0 // adds ge r5 r11 r10
44 0x09, 0x00, 0x99, 0x90 // adds ls r0 r9 r9
47 0x02, 0x80, 0x97, 0xd0 // adds le r8 r7 r2
50 0x0d, 0x10, 0x9a, 0x00 // adds eq r1 r10 r13
53 0x02, 0x90, 0x9c, 0xd0 // adds le r9 r12 r2
56 0x05, 0x60, 0x91, 0x50 // adds pl r6 r1 r5
59 0x06, 0x10, 0x9c, 0xa0 // adds ge r1 r12 r6
62 0x03, 0xd0, 0x9c, 0x30 // adds cc r13 r12 r3
65 0x09, 0x20, 0x94, 0xc0 // adds gt r2 r4 r
[all...] |
| assembler-cond-rd-rn-operand-rm-t32-adds.h | 38 0x19, 0xeb, 0x0b, 0x0c // adds al r12 r9 r11
41 0x14, 0xeb, 0x0a, 0x03 // adds al r3 r4 r10
44 0x10, 0xeb, 0x0c, 0x02 // adds al r2 r0 r12
47 0x19, 0xeb, 0x0d, 0x09 // adds al r9 r9 r13
50 0x12, 0xeb, 0x04, 0x0b // adds al r11 r2 r4
53 0xdf, 0x19 // adds al r7 r3 r7
56 0x16, 0xeb, 0x09, 0x0b // adds al r11 r6 r9
59 0x17, 0xeb, 0x0b, 0x08 // adds al r8 r7 r11
62 0x1c, 0xeb, 0x0e, 0x0e // adds al r14 r12 r14
65 0x15, 0xeb, 0x08, 0x08 // adds al r8 r5 r
[all...] |
| assembler-cond-rd-rn-operand-rm-shift-rs-a32-adds.h | 38 0x1a, 0x6c, 0x98, 0xe0 // adds al r6 r8 r10 LSL r12
41 0x16, 0x54, 0x9d, 0x80 // adds hi r5 r13 r6 LSL r4
44 0x7e, 0xb1, 0x90, 0x60 // adds vs r11 r0 r14 ROR r1
47 0x7b, 0x54, 0x90, 0x70 // adds vc r5 r0 r11 ROR r4
50 0x16, 0x91, 0x97, 0x00 // adds eq r9 r7 r6 LSL r1
53 0x3c, 0xc0, 0x99, 0x20 // adds cs r12 r9 r12 LSR r0
56 0x5d, 0xc3, 0x93, 0x40 // adds mi r12 r3 r13 ASR r3
59 0x30, 0xd1, 0x94, 0x60 // adds vs r13 r4 r0 LSR r1
62 0x13, 0x3d, 0x97, 0x30 // adds cc r3 r7 r3 LSL r13
65 0x11, 0xa6, 0x91, 0xd0 // adds le r10 r1 r1 LSL r
[all...] |
| assembler-cond-rd-rn-operand-const-a32-adds.h | 38 0xff, 0x97, 0x94, 0xd2 // adds le r9 r4 0x03fc0000
41 0xff, 0xeb, 0x93, 0x52 // adds pl r14 r3 0x0003fc00
44 0xff, 0x15, 0x96, 0x32 // adds cc r1 r6 0x3fc00000
47 0xab, 0x57, 0x91, 0x32 // adds cc r5 r1 0x02ac0000
50 0xab, 0xe2, 0x94, 0x52 // adds pl r14 r4 0xb000000a
53 0xff, 0x2b, 0x9d, 0x22 // adds cs r2 r13 0x0003fc00
56 0xab, 0xd5, 0x90, 0x42 // adds mi r13 r0 0x2ac00000
59 0xff, 0x0a, 0x90, 0x72 // adds vc r0 r0 0x000ff000
62 0xff, 0x2e, 0x99, 0x62 // adds vs r2 r9 0x00000ff0
65 0xff, 0xf0, 0x97, 0x32 // adds cc r15 r7 0x000000f
[all...] |
| assembler-cond-rd-rn-operand-const-t32-adds.h | 38 0x1e, 0xf1, 0x2b, 0x7d // adds al r13 r14 0x02ac0000
41 0x11, 0xf5, 0xab, 0x1a // adds al r10 r1 0x00156000
44 0x10, 0xf5, 0x7f, 0x7a // adds al r10 r0 0x000003fc
47 0x1b, 0xf1, 0x2b, 0x51 // adds al r1 r11 0x2ac00000
50 0x16, 0xf5, 0xab, 0x18 // adds al r8 r6 0x00156000
53 0x1c, 0xf5, 0x7f, 0x07 // adds al r7 r12 0x00ff0000
56 0x13, 0xf5, 0x7f, 0x0c // adds al r12 r3 0x00ff0000
59 0x17, 0xf5, 0x7f, 0x44 // adds al r4 r7 0x0000ff00
62 0x1d, 0xf1, 0x2b, 0x6b // adds al r11 r13 0x0ab00000
65 0x1c, 0xf1, 0xff, 0x26 // adds al r6 r12 0xff00ff0
[all...] |
| /art/runtime/interpreter/mterp/arm/ |
| op_add_long.S | 1 %include "arm/binopWide.S" {"preinstr":"adds r0, r0, r2", "instr":"adc r1, r1, r3"}
|
| op_add_long_2addr.S | 1 %include "arm/binopWide2addr.S" {"preinstr":"adds r0, r0, r2", "instr":"adc r1, r1, r3"}
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| reloc-bad.s | 6 adds r1 = @gprel(esym), r0
8 adds r1 = @ltoff(esym), r0
12 adds r1 = @pltoff(esym), r0
15 adds r1 = @fptr(esym), r0
18 adds r1 = @pcrel(esym), r0
20 adds r1 = @ltoff(@fptr(esym)), r0
22 adds r1 = @segrel(esym), r0
26 adds r1 = @secrel(esym), r0
30 adds r1 = @ltv(esym), r0
34 adds r1 = @iplt(esym), r
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| bundle-lock.d | 12 # offset) or adds (what we use at the beginning of each bundle-locked
17 *0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
19 *10:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
21 *20:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
23 *30:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
25 *40:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
27 *50:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
29 *60:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
31 *70:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
33 *80:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.
[all...] |
| addsw-bad.s | 6 adds r4, r6, #0x496 label
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
| iarith.s | 1 # addu, adds, subu, subs
18 adds %r0,%r1,%r2
19 adds %r3,%r4,%r5
20 adds %r6,%r7,%r8
21 adds %r9,%r10,%r11
22 adds %r31,%r13,%r14
23 adds %r15,%r16,%r17
24 adds %r18,%r19,%r20
25 adds %r21,%r22,%r23
26 adds %r24,%r25,%r3
[all...] |
| dir-align01.s | 4 adds %r4,%r5,%r6
6 adds %r10,%r11,%r12
|
| dir-intel02.s | 8 adds r24,r9,r8
12 adds r24,r9,r8
|
| /external/llvm/test/MC/AArch64/ |
| alias-addsubimm.s | 44 adds w0, w2, #-2, lsl 12
48 adds x1, x3, #-2, lsl 12
52 adds x1, x3, #-4
56 adds x1, x3, #-4095, lsl 0
60 // CHECK: adds w0, w2, #2, lsl #12
61 // CHECK: adds w0, w2, #2, lsl #12
62 adds w0, w2, #2, lsl 12
64 // CHECK: adds x1, x3, #2, lsl #12
65 // CHECK: adds x1, x3, #2, lsl #12
66 adds x1, x3, #2, lsl 1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/h8300/ |
| addsub.s | 6 adds #1,r4
7 adds #2,r5
|
