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  /art/test/468-checker-bool-simplif-regression/smali/
TestCase.smali 22 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
26 ## CHECK-DAG: <<Phi:i\d+>> Phi [<<Const1>>,<<Const0>>]
30 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
33 ## CHECK-DAG: <<Select:i\d+>> Select [<<Const1>>,<<Const0>>,<<Value>>]
  /art/test/517-checker-builder-fallthrough/smali/
TestCase.smali 24 ## CHECK: <<Const0:i\d+>> IntConstant 0
28 ## CHECK: <<Cond:z\d+>> Equal [<<Const0>>,<<Const0>>]
  /external/libvpx/libvpx/vp9/encoder/mips/msa/
vp9_fdct16x16_msa.c 18 const int32_t *const0, int16_t *int_buf) {
31 LD_SW2(const0, 4, k0, k1);
32 LD_SW2(const0 + 8, 4, k2, k3);
41 LD_SW2(const0 + 4 * 4, 4, k0, k1);
42 LD_SW2(const0 + 4 * 6, 4, k2, k3);
50 LD_SW2(const0 + 4 * 8, 4, k0, k1);
51 k2 = LD_SW(const0 + 4 * 10);
63 LD_SW2(const0 + 4 * 11, 4, k0, k1);
64 LD_SW2(const0 + 4 * 13, 4, k2, k3);
75 LD_SW2(const0 + 4 * 15, 4, k0, k1)
    [all...]
  /art/test/591-checker-regression-dead-loop/src/
Main.java 21 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
23 /// CHECK-DAG: <<Phi:i\d+>> Phi [<<Const0>>,<<Add:i\d+>>] loop:{{B\d+}}
  /external/libvpx/libvpx/vp8/encoder/mips/msa/
dct_msa.c 72 v8i16 const0, const1; local
84 SET_DOTP_VALUES(coeff, 0, 1, 2, const0, const1);
90 DPADD_SH2_SW(temp0, temp0, const0, const1, out0, out1);
107 DPADD_SH2_SW(temp0, temp0, const0, const1, out1, out3);
118 v8i16 const0, const1, const2; local
152 const0 = RET_1_IF_NZERO_H(in3);
160 in1 += const0;
  /art/test/463-checker-boolean-simplifier/src/
Main.java 42 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
45 /// CHECK-DAG: <<Phi:i\d+>> Phi [<<Const1>>,<<Const0>>]
56 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
58 /// CHECK-DAG: <<NotParam:i\d+>> Select [<<Const1>>,<<Const0>>,<<Param>>]
81 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
85 /// CHECK-DAG: <<Phi:i\d+>> Phi [<<Const0>>,<<Const1>>]
91 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
94 /// CHECK-DAG: <<Select:i\d+>> Select [<<Const0>>,<<Const1>>,<<Cond>>]
109 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
113 /// CHECK-DAG: <<Phi:i\d+>> Phi [<<Const1>>,<<Const0>>]
    [all...]
  /external/mesa3d/src/gallium/drivers/r300/compiler/tests/
radeon_compiler_optimize_tests.c 59 float const0[4] = {2.0f, 0.0f, 0.0f, 0.0f}; local
63 rc_constants_add_immediate_vec4(&c.Program.Constants, const0);
  /art/test/442-checker-constant-folding/src/
Main.java     [all...]
  /art/test/442-checker-constant-folding/smali/
TestCmp.smali 143 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
144 ## CHECK-DAG: Return [<<Const0>>]
164 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
165 ## CHECK-DAG: Return [<<Const0>>]
185 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
186 ## CHECK-DAG: Return [<<Const0>>]
206 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
207 ## CHECK-DAG: Return [<<Const0>>]
227 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
228 ## CHECK-DAG: Return [<<Const0>>]
    [all...]
  /external/mesa3d/src/mesa/state_tracker/
st_pbo.c 418 struct ureg_src const0; local
456 const0 = ureg_DECL_constant(ureg, 0);
460 /* Note: const0 = [ -xoffset + skip_pixels, -yoffset, stride, image_height ] */
468 /* temp0.xy = temp0.xy + const0.xy */
473 ureg_swizzle(const0,
477 /* temp0.x = const0.z * temp0.y + temp0.x */
479 ureg_scalar(const0, TGSI_SWIZZLE_Z),
484 /* temp0.x = const0.w * layer + temp0.x */
486 ureg_scalar(const0, TGSI_SWIZZLE_W),
  /art/test/458-checker-instruct-simplification/smali/
SmaliTests.smali 64 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
65 ## CHECK-DAG: <<Cond:z\d+>> Equal [<<Arg>>,<<Const0>>]
86 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
87 ## CHECK-DAG: <<Cond:z\d+>> Equal [<<Const0>>,<<Arg>>]
152 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
153 ## CHECK-DAG: <<Cond:z\d+>> NotEqual [<<Arg>>,<<Const0>>]
174 ## CHECK-DAG: <<Const0:i\d+>> IntConstant 0
175 ## CHECK-DAG: <<Cond:z\d+>> NotEqual [<<Const0>>,<<Arg>>]
  /art/compiler/dex/
inline_method_analyser.cc 61 bool Const0();
118 bool Matcher::Const0() {
185 uint16_t GetZeroVRegMask(const Instruction* const0) {
186 DCHECK(IsInstructionDirectConst(const0->Opcode()));
187 DCHECK((const0->Opcode() == Instruction::CONST_WIDE) ? const0->VRegB_51l() == 0u
188 : const0->VRegB() == 0);
189 uint16_t base_mask = IsInstructionConstWide(const0->Opcode()) ? 3u : 1u;
190 return base_mask << const0->VRegA();
282 &Matcher::Repeated<&Matcher::Const0>,
    [all...]
  /art/test/527-checker-array-access-simd/src/
Main.java 88 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
95 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>]
98 /// CHECK-DAG: <<Address2:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>]
103 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
110 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>]
140 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
  /art/test/565-checker-doublenegbitwise/src/
Main.java 100 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
102 /// CHECK-DAG: <<Select1:i\d+>> Select [<<Const1>>,<<Const0>>,<<P1>>]
103 /// CHECK-DAG: <<Select2:i\d+>> Select [<<Const1>>,<<Const0>>,<<P2>>]
171 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
173 /// CHECK-DAG: <<Select1:i\d+>> Select [<<Const1>>,<<Const0>>,<<P1>>]
174 /// CHECK-DAG: <<Select2:i\d+>> Select [<<Const1>>,<<Const0>>,<<P2>>]
281 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
283 /// CHECK-DAG: <<Select1:i\d+>> Select [<<Const1>>,<<Const0>>,<<P1>>]
284 /// CHECK-DAG: <<Select2:i\d+>> Select [<<Const1>>,<<Const0>>,<<P2>>]
  /external/r8/src/test/java/com/android/tools/r8/ir/regalloc/
IdenticalAfterRegisterAllocationTest.java 50 ConstNumber const0 = new ConstNumber(ConstType.INT, value0, 0); local
  /prebuilts/go/darwin-x86/src/go/types/testdata/
constdecl.src 97 // TODO(gri) move extra tests from testdata/const0.src into here
  /prebuilts/go/linux-x86/src/go/types/testdata/
constdecl.src 97 // TODO(gri) move extra tests from testdata/const0.src into here
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
fp-const0-parse.s 1 /* fp-const0-parse.s Test file For AArch64 float constant 0 parse.
  /external/webp/src/dsp/
upsampling_msa.c 38 const v4i32 const0 = (v4i32)__msa_fill_w(cnst * 256); \
40 MUL4(in0, const0, in1, const0, in2, const0, in3, const0, \
46 const v4i32 const0 = (v4i32)__msa_fill_w(cnst * 256); \
48 MUL2(in0, const0, in1, const0, temp0, temp1); \
  /external/mesa3d/src/gallium/state_trackers/xa/
xa_tgsi.c 131 struct ureg_src const0, struct ureg_src const1)
136 ureg_MAD(ureg, tmp, coords, const0, const1);
267 struct ureg_src const0, const1; local
278 const0 = ureg_DECL_constant(ureg, 0);
286 src = vs_normalize_coords(ureg, src, const0, const1);
  /art/test/458-checker-instruct-simplification/src/
Main.java 65 /// CHECK-DAG: <<Const0:j\d+>> LongConstant 0
66 /// CHECK-DAG: <<Add:j\d+>> Add [<<Const0>>,<<Arg>>]
413 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
414 /// CHECK-DAG: <<Or:i\d+>> Or [<<Arg>>,<<Const0>>]
448 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
449 /// CHECK-DAG: <<Shl:i\d+>> Shl [<<Arg>>,<<Const0>>]
466 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
467 /// CHECK-DAG: <<Shr:j\d+>> Shr [<<Arg>>,<<Const0>>]
502 /// CHECK-DAG: <<Const0:j\d+>> LongConstant 0
503 /// CHECK-DAG: <<Sub:j\d+>> Sub [<<Arg>>,<<Const0>>]
    [all...]
  /art/test/611-checker-simplify-if/src/
Main.java 39 /// CHECK: <<Const0:i\d+>> IntConstant 0
42 /// CHECK: <<Equal:z\d+>> Equal [<<Phi>>,<<Const0>>]
68 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
  /art/test/706-checker-scheduler/src/
Main.java 220 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
233 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
246 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
259 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0
  /external/llvm/lib/Target/AMDGPU/
AMDGPU.h 142 PARAM_D_ADDRESS = 6, ///< Address space for direct addressible parameter memory (CONST0)
  /external/libvpx/libvpx/vpx_dsp/mips/
fwd_txfm_msa.h 328 const0, const1, out0, out1, out2, out3) \
332 v4i32 k0_m = __msa_fill_w((int32_t)const0); \

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