| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMFixupKinds.h | 29 // fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
32 fixup_arm_pcrel_10, enumerator in enum:llvm::ARM::Fixups
33 // fixup_t2_pcrel_10 - Equivalent to fixup_arm_pcrel_10, accounting for
|
| ARMAsmBackend.cpp | 62 {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
112 {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
421 // Same addressing mode as fixup_arm_pcrel_10,
623 case ARM::fixup_arm_pcrel_10:
643 // Same addressing mode as fixup_arm_pcrel_10, but with 16-bit halfwords
759 case ARM::fixup_arm_pcrel_10:
815 case ARM::fixup_arm_pcrel_10:
[all...] |
| ARMELFObjectWriter.cpp | 230 case ARM::fixup_arm_pcrel_10:
|
| ARMMachObjectWriter.cpp | 86 case ARM::fixup_arm_pcrel_10:
|
| ARMMCCodeEmitter.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| ARMFixupKinds.h | 26 // fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
29 fixup_arm_pcrel_10, enumerator in enum:llvm::ARM::Fixups
30 // fixup_t2_pcrel_10 - Equivalent to fixup_arm_pcrel_10, accounting for
|
| ARMAsmBackend.cpp | 66 { "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
226 // Same addressing mode as fixup_arm_pcrel_10,
362 case ARM::fixup_arm_pcrel_10:
379 // Same addressing mode as fixup_arm_pcrel_10,
468 case ARM::fixup_arm_pcrel_10:
|
| ARMMachObjectWriter.cpp | 79 case ARM::fixup_arm_pcrel_10:
|
| ARMMCCodeEmitter.cpp | 794 MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10);
[all...] |
| /external/llvm/test/MC/ARM/ |
| big-endian-arm-fixup.s | 43 @ARM::fixup_arm_pcrel_10
|
| /external/swiftshader/third_party/LLVM/lib/MC/ |
| ELFObjectWriter.cpp | [all...] |
