| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-nds32/ |
| imm_symbol.s | 1 .globl imm32
5 .set imm32, 0x11223344
|
| imm.s | 4 la $r0, imm32
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| fadd.sm | 1 fadd #{imm32},{reg}
|
| fcmp.sm | 1 fcmp #{imm32},{reg}
|
| fdiv.sm | 1 fdiv #{imm32},{reg}
|
| fmul.sm | 1 fmul #{imm32},{reg}
|
| fsub.sm | 1 fsub #{imm32},{reg}
|
| macros.inc | 26 macro imm32 {-2147483648;4294967295}
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-crx/ |
| reloc-imm32.d | 1 #source: reloc-imm32.s
|
| /external/google-breakpad/src/processor/testdata/ |
| minidump2.stackwalk.machine_readable.out | 6 Module|imm32.dll|5.1.2600.2180|imm32.pdb|2C17A49C251B4C8EB9E2AD13D7D9EA162|0x76390000|0x763acfff|0
|
| /external/valgrind/none/tests/amd64/ |
| insn_basic.def | 29 ###adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
30 ###adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
31 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
32 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
33 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
34 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
43 ###adcq eflags[0x1,0x0] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432199999999]
44 ###adcq eflags[0x1,0x1] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432200000000]
45 adcq eflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432199999999]
46 adcq eflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432200000000
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| d30v-opc.c | 388 #define IMM32 (REL32 + 1)
390 #define Fa (IMM32 + 1)
479 { LONG, 2, { Ra, Rb, IMM32 } }, /* Ra,Rb,imm32 */
480 { LONG_U, 2, { IMM32 } }, /* imm32 */
482 { LONG_CMP, 2, { CC, Fa2, Rb, IMM32} }, /* CC Fa2,Rb,imm32 */
483 { LONG_M, 2, { Ra, ATPAR, Rb, IMM32 } }, /* Ra,@(Rb,imm32) */
[all...] |
| m10300-opc.c | 105 #define IMM32 (IMM16_MEM+1)
109 #define IMM32_PCREL (IMM32+1)
540 { "mov", 0xfccc0000, 0xfffc0000, 0, FMT_D4, 0, {IMM32, DN0}},
542 { "mov", 0xfcdc0000, 0xfffc0000, 0, FMT_D4, 0, {IMM32, AN0}},
547 { "mov", 0xfc000000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), DN1}},
548 { "mov", 0xfcb40000, 0xfffc0000, 0, FMT_D4, 0, {MEM2(IMM32, SP), DN0}},
549 { "mov", 0xfc200000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), AN1}},
550 { "mov", 0xfcb00000, 0xfffc0000, 0, FMT_D4, 0, {MEM2(IMM32, SP), AN0}},
551 { "mov", 0xfc100000, 0xfff00000, 0, FMT_D4, 0, {DM1, MEM2(IMM32,AN0)}},
552 { "mov", 0xfc910000, 0xfff30000, 0, FMT_D4, 0, {DM1, MEM2(IMM32, SP)}}
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| and_test.s | 41 # ANDD imm4/imm16/imm32, regp
|
| cmp_test.s | 44 # CMPD imm4/imm16/imm32, regp
|
| or_test.s | 41 # ORD imm32, regp
|
| xor_test.s | 41 # XORD imm32, regp
|
| add_test.s | 80 # ADDD imm4/imm16/imm20/imm32, regp
|
| mov_test.s | 44 # MOVD imm4/imm16/imm20/imm32, regp
|
| sub_test.s | 77 # SUBD imm4/imm16/imm32, regp
|
| /external/valgrind/none/tests/x86/ |
| insn_basic.def | 49 adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
50 adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
51 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
52 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
75 addl imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
76 addl imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
77 addl imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
95 andl imm32[0x86427531] eax.ud[0x12345678] => 1.ud[0x02005430
[all...] |
| /toolchain/binutils/binutils-2.25/gas/doc/ |
| c-nds32.texi | 177 @item li rt5,imm32
178 load 32-bit integer into register rt5. @samp{sethi rt5,hi20(imm32)} and then
179 @samp{ori rt5,reg,lo12(imm32)}.
253 @item move rt5,imm32
254 This is the same as @samp{li rt5,imm32}.
277 @item pushi imm32
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
| Thunk16.S | 44 .byte 0x66, 0xba # mov edx, imm32
65 .byte 0x66, 0xb8 # mov eax, imm32
69 .byte 0x66, 0xb8 # mov eax, imm32
75 .byte 0x66, 0xbc # mov esp, imm32
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| Thunk16.S | 66 .byte 0x66, 0xba # mov edx, imm32
88 .byte 0x66, 0xb8 # mov eax, imm32
92 .byte 0x66, 0xb8 # mov eax, imm32
98 .byte 0x66, 0xbc # mov esp, imm32
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/X64/ |
| SmmInit.S | 43 .byte 0x66,0xb8 # mov eax, imm32
48 .byte 0x66,0xb8 # mov eax, imm32
57 .byte 0x66,0xb8 # mov eax, imm32
|
