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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
ldst-reg-pair.d 20 30: 69603fe7 ldpsw x7, x15, \[sp,#-256\]
21 34: 6970bfe7 ldpsw x7, x15, \[sp,#-124\]
22 38: 697fbfe7 ldpsw x7, x15, \[sp,#-4\]
23 3c: 69403fe7 ldpsw x7, x15, \[sp\]
24 40: 6947bfe7 ldpsw x7, x15, \[sp,#60\]
25 44: 695fbfe7 ldpsw x7, x15, \[sp,#252\]
86 138: 68e03fe7 ldpsw x7, x15, \[sp\],#-256
87 13c: 68f0bfe7 ldpsw x7, x15, \[sp\],#-124
88 140: 68ffbfe7 ldpsw x7, x15, \[sp\],#-4
89 144: 68c03fe7 ldpsw x7, x15, \[sp\],#
    [all...]
ldst-reg-pair.s 67 op3 ldpsw, x, 4, \type
  /external/llvm/test/CodeGen/AArch64/
arm64-ldp.ll 14 ; CHECK: ldpsw
98 ; CHECK: ldpsw [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-8]
201 ; CHECK: ldpsw [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-256]
331 ; CHECK: ldpsw x{{[0-9]+}}, x{{[0-9]+}}, [x{{[0-9]+}}, #8]
346 ; CHECK: ldpsw x{{[0-9]+}}, x{{[0-9]+}}, [x0], #8
ldp-stp-scaled-unscaled-pairs.ll 76 ; CHECK-NEXT: ldpsw [[V0:x[0-9]+]], [[V1:x[0-9]+]], [x0, #-4]
arm64-ldp-cluster.ll 25 ; Test ldpsw clustering
  /external/llvm/test/MC/AArch64/
arm64-memory.s 284 ldpsw x2, x3, [x14, #16]
285 ldpsw x2, x3, [sp, #-16]
292 ; CHECK: ldpsw x2, x3, [x14, #16] ; encoding: [0xc2,0x0d,0x42,0x69]
293 ; CHECK: ldpsw x2, x3, [sp, #-16] ; encoding: [0xe2,0x0f,0x7e,0x69]
316 ldpsw x2, x3, [x14, #16]!
317 ldpsw x2, x3, [sp, #-16]!
323 ; CHECK: ldpsw x2, x3, [x14, #16]! ; encoding: [0xc2,0x0d,0xc2,0x69]
324 ; CHECK: ldpsw x2, x3, [sp, #-16]! ; encoding: [0xe2,0x0f,0xfe,0x69]
344 ldpsw x2, x3, [x14], #16
345 ldpsw x2, x3, [sp], #-1
    [all...]
basic-a64-diagnostics.s     [all...]
basic-a64-instructions.s     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64Schedule.td 73 // LDP,LDPSW,LDNP,LDXP,LDAXP
AArch64InstrInfo.td     [all...]
  /external/llvm/test/MC/Disassembler/AArch64/
arm64-memory.txt 290 # CHECK: ldpsw x2, x3, [x14, #16]
291 # CHECK: ldpsw x2, x3, [sp, #-16]
318 # CHECK: ldpsw x2, x3, [x14, #16]!
319 # CHECK: ldpsw x2, x3, [sp, #-16]!
346 # CHECK: ldpsw x2, x3, [x14], #16
347 # CHECK: ldpsw x2, x3, [sp], #-16
basic-a64-instructions.txt     [all...]
  /external/valgrind/none/tests/arm64/
memory.c 286 printf("LDPSW (immediate, simm7)\n");
288 TESTINST2_hide2("ldpsw x21, x28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0);
289 TESTINST2_hide2("ldpsw x21, x28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0);
290 TESTINST2_hide2("ldpsw x21, x28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0);
291 TESTINST2_hide2("ldpsw x21, x28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0);
292 TESTINST2_hide2("ldpsw x21, x28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0);
293 TESTINST2_hide2("ldpsw x21, x28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0);
    [all...]
memory.stdout.exp 101 LDPSW (immediate, simm7)
102 ldpsw x21, x28, [x22], #-24 ; add x21,x21,x28 :: rd ffffffffebe9e7e4 rn (hidden), cin 0, nzcv 00000000
103 ldpsw x21, x28, [x22], #-24 ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
104 ldpsw x21, x28, [x22, #-40]! ; add x21,x21,x28 :: rd ffffffff9b999794 rn (hidden), cin 0, nzcv 00000000
105 ldpsw x21, x28, [x22, #-40]! ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
106 ldpsw x21, x28, [x22, #-40] ; add x21,x21,x28 :: rd ffffffff9b999794 rn (hidden), cin 0, nzcv 00000000
107 ldpsw x21, x28, [x22, #-40] ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
    [all...]
  /external/v8/src/arm64/
constants-arm64.h 712 V(LDPSW, x, 0x40400000), \
    [all...]
disasm-arm64.cc 868 V(LDPSW_x, "ldpsw", "'Xt, 'Xt2", "4") \
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
aarch64-tbl.h 1053 /* e.g. LDPSW <Xt1>, <Xt2>, [<Xn|SP>{, #<imm>}]. */
    [all...]
aarch64-dis-2.c 454 ldpsw. */
572 ldpsw. */
    [all...]
  /external/vixl/doc/aarch64/
supported-instructions-aarch64.md 587 ### LDPSW ###
591 void ldpsw(const Register& xt, const Register& xt2, const MemOperand& src)
    [all...]
  /external/vixl/test/aarch64/
test-disasm-aarch64.cc     [all...]
test-trace-aarch64.cc 174 __ ldpsw(x27, x28, MemOperand(x0));
175 __ ldpsw(x27, x28, MemOperand(x1, 8, PostIndex));
176 __ ldpsw(x27, x28, MemOperand(x1, 8, PreIndex));
    [all...]
  /external/valgrind/VEX/priv/
guest_arm64_toIR.c     [all...]
  /external/vixl/src/aarch64/
constants-aarch64.h 760 V(LDPSW, x, 0x40400000), \
    [all...]
  /external/vixl/test/test-trace-reference/
log-disasm 120 0x~~~~~~~~~~~~~~~~ 6940701b ldpsw x27, x28, [x0]
121 0x~~~~~~~~~~~~~~~~ 68c1703b ldpsw x27, x28, [x1], #8
122 0x~~~~~~~~~~~~~~~~ 69c1703b ldpsw x27, x28, [x1, #8]!
    [all...]
log-disasm-colour 120 0x~~~~~~~~~~~~~~~~ 6940701b ldpsw x27, x28, [x0]
121 0x~~~~~~~~~~~~~~~~ 68c1703b ldpsw x27, x28, [x1], #8
122 0x~~~~~~~~~~~~~~~~ 69c1703b ldpsw x27, x28, [x1, #8]!
    [all...]

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