| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/ |
| sploop-bad-5.l | 2 [^:]*:5: Error: functional unit already masked for operand 2 of 'spmask'
3 [^:]*:6: Error: functional unit already masked for operand 2 of 'spmaskr'
4 [^:]*:8: Error: functional unit already masked
5 [^:]*:10: Error: functional unit already masked
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-11-13-VirtRegRewriterBug.ll | 9 %mask133.masked.masked.masked.masked.masked.masked = or i640 undef, undef ; <i640> [#uses=1]
31 %mask271.masked.masked.masked.masked.masked.masked.masked = or i256 0, undef ; <i256> [#uses=2
[all...] |
| pr28515.ll | 10 %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>* bitcast (i32* getelementptr ([8 x i32], [8 x i32]* @0, i64 0, i64 0) to <8 x i32>*), i32 4, <8 x i1> %mask, <8 x i32> undef)
14 declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8 x i32>) #0
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| 2009-11-13-VirtRegRewriterBug.ll | 9 %mask133.masked.masked.masked.masked.masked.masked = or i640 undef, undef ; <i640> [#uses=1]
31 %mask271.masked.masked.masked.masked.masked.masked.masked = or i256 0, undef ; <i256> [#uses=2
[all...] |
| /external/llvm/test/CodeGen/AMDGPU/ |
| llvm.exp2.ll | 8 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
9 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
10 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
26 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
27 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
28 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
29 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
30 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
31 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
51 ;CM-DAG: EXP_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
[all...] |
| llvm.log2.ll | 8 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
9 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
10 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
26 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
27 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
28 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
29 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
30 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
31 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
51 ;CM-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
[all...] |
| lower-range-metadata-intrinsic-call.ll | 17 ; CHECK: v_and_b32_e32 [[MASKED:v[0-9]+]], 0x1ff, v0
18 ; CHECK: {{flat|buffer}}_store_dword {{.*}}[[MASKED]]
29 ; CHECK: v_and_b32_e32 [[MASKED:v[0-9]+]], 0xff, v0
30 ; CHECK: {{flat|buffer}}_store_dword {{.*}}[[MASKED]]
|
| /external/llvm/test/Transforms/InstCombine/ |
| masked_intrinsics.ll | 3 declare <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptrs, i32, <2 x i1> %mask, <2 x double> %src0)
4 declare void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptrs, i32, <2 x i1> %mask)
5 declare <2 x double> @llvm.masked.gather.v2f64(<2 x double*> %ptrs, i32, <2 x i1> %mask, <2 x double> %passthru)
6 declare void @llvm.masked.scatter.v2f64(<2 x double> %val, <2 x double*> %ptrs, i32, <2 x i1> %mask)
9 %res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 1, <2 x i1> zeroinitializer, <2 x double> %passthru)
17 %res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 2, <2 x i1> <i1 1, i1 1>, <2 x double> %passthru)
26 %res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 2, <2 x i1> <i1 1, i1 undef>, <2 x double> %passthru)
35 call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptr, i32 3, <2 x i1> zeroinitializer)
43 call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptr, i32 4, <2 x i1> <i1 1, i1 1>)
52 %res = call <2 x double> @llvm.masked.gather.v2f64(<2 x double*> %ptrs, i32 5, <2 x i1> zeroinitializer, <2 x double> %passthru
[all...] |
| /device/linaro/bootloader/edk2/IntelFspPkg/FspSecCore/Ia32/ |
| InitializeFpu.asm | 21 ; all exceptions masked, double-precision, round-to-nearest
26 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
37 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
38 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
39 ; for masked underflow).
|
| InitializeFpu.s | 18 # all exceptions masked, double-precision, round-to-nearest
23 # all exceptions masked, round-to-nearest, flush to zero for masked underflow
33 # masked,double-precision, round-to-nearest) and multimedia-extensions control word
34 # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
35 # for masked underflow).
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/ |
| InitializeFpu.S | 17 # all exceptions masked, double-precision, round-to-nearest
22 # all exceptions masked, round-to-nearest, flush to zero for masked underflow
30 # masked,double-precision, round-to-nearest) and multimedia-extensions control word
31 # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
32 # for masked underflow).
|
| InitializeFpu.asm | 21 ; all exceptions masked, double-precision, round-to-nearest
26 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
37 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
38 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
39 ; for masked underflow).
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/BaseUefiCpuLib/X64/ |
| InitializeFpu.S | 19 # masked,double-extended-precision, round-to-nearest) and multimedia-extensions control word
20 # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
21 # for masked underflow).
33 # all exceptions masked, double-precision, round-to-nearest
49 # all exceptions masked, round-to-nearest, flush to zero for masked underflow
|
| InitializeFpu.asm | 19 ; all exceptions masked, double-extended-precision, round-to-nearest
24 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
35 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
36 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
37 ; for masked underflow).
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| masked-intrinsic-cost.ll | 7 ; AVX2: Found an estimated cost of 4 {{.*}}.masked
10 %res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %addr, i32 4, <2 x i1>%mask, <2 x double>%dst)
15 ; AVX2: Found an estimated cost of 4 {{.*}}.masked
18 %res = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %addr, i32 4, <4 x i1>%mask, <4 x i32>%dst)
23 ; AVX2: Found an estimated cost of 4 {{.*}}.masked
26 call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>%val, <4 x i32>* %addr, i32 4, <4 x i1>%mask)
31 ; AVX2: Found an estimated cost of 4 {{.*}}.masked
34 %res = call <8 x float> @llvm.masked.load.v8f32.p0v8f32(<8 x float>* %addr, i32 4, <8 x i1>%mask, <8 x float>%dst)
39 ; AVX2: Found an estimated cost of 5 {{.*}}.masked
42 call void @llvm.masked.store.v2f32.p0v2f32(<2 x float>%val, <2 x float>* %addr, i32 4, <2 x i1>%mask
[all...] |
| /external/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /external/llvm/test/CodeGen/PowerPC/ |
| rlwimi-dyn-and.ll | 17 %shl161.masked = and i32 %shl161, %const_mat
18 %conv174 = or i32 %shl170, %shl161.masked
37 %shl161.masked = and i32 %shl161, 32768
38 %conv174 = or i32 %shl170, %shl161.masked
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Support/ELFRelocs/ |
| Lanai.def | 10 // 21-bit symbol relocation with last two bits masked to 0
|
