| /external/mesa3d/src/mesa/x86/ |
| sse_normal.S | 76 MOVSS ( M(0), XMM1 ) /* m0 */
77 MOVSS ( M(5), XMM2 ) /* m5 */
79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
90 MOVSS ( S(2), XMM2 ) /* uz */
92 MOVSS ( XMM2, D(2) ) /* ->D(2) */
138 MOVSS ( M(0), XMM0 ) /* m0 */
139 MOVSS ( M(4), XMM1 ) /* m4 */
142 MOVSS ( ARG_SCALE, XMM4 ) /* scale */
146 MOVSS ( M(1), XMM1 ) /* m1 */
147 MOVSS ( M(5), XMM2 ) /* m5 *
[all...] |
| sse_xform1.S | 82 MOVSS( S(0), XMM2 ) /* ox */
186 MOVSS( M(0), XMM0 ) /* m0 */
187 MOVSS( M(12), XMM1 ) /* m12 */
188 MOVSS( M(13), XMM2 ) /* m13 */
189 MOVSS( M(14), XMM3 ) /* m14 */
193 MOVSS( S(0), XMM4 ) /* ox */
196 MOVSS( XMM4, D(0) )
198 MOVSS( XMM2, D(1) )
199 MOVSS( XMM3, D(2) )
248 MOVSS( M(0), XMM1 ) /* m0 *
[all...] |
| sse_xform3.S | 85 MOVSS ( REGOFF(0, ESI), XMM4 ) /* | | | ox */
87 MOVSS ( REGOFF(4, ESI), XMM5 ) /* | | | oy */
89 MOVSS ( REGOFF(8, ESI), XMM6 ) /* | | | oz */
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
204 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
205 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
208 MOVSS ( M(10), XMM3 ) /* - | - | - | m10 */
209 MOVSS ( M(14), XMM4 ) /* - | - | - | m14 */
219 MOVSS ( S(2), XMM0 ) /* sz *
[all...] |
| sse_xform4.S | 78 MOVSS( SRC(0), XMM0 ) /* ox */
82 MOVSS( SRC(1), XMM1 ) /* oy */
86 MOVSS( SRC(2), XMM2 ) /* oz */
90 MOVSS( SRC(3), XMM3 ) /* ow */
150 MOVSS( SRC(0), XMM4 ) /* ox */
154 MOVSS( SRC(1), XMM5 ) /* oy */
158 MOVSS( SRC(2), XMM6 ) /* oz */
162 MOVSS( SRC(3), XMM7 ) /* ow */
171 MOVSS( SRC(3), XMM4 ) /* ow */
172 MOVSS( XMM4, DST(3) ) /* ->D(3) *
[all...] |
| sse_xform2.S | 82 MOVSS( S(0), XMM3 ) /* ox */
85 MOVSS( S(1), XMM4 ) /* oy */
192 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
193 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
196 MOVSS ( M(14), XMM3 ) /* - | - | - | m14 */
205 MOVSS ( XMM3, D(2) ) /* -> D(2) */
251 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
252 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
254 MOVSS ( M(14), XMM3 ) /* m14 */
262 MOVSS( XMM3, D(2) ) /* ->D(2) *
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| uint_to_fp-2.ll | 10 ; CHECK: movss
22 ; CHECK: movss {{.*}}, [[ZERO]]
26 ; CHECK: movss
|
| vec_set-J.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
|
| vector-variable-idx.ll | 1 ; RUN: llc < %s -march=x86-64 | grep movss | count 2
|
| peep-vector-extract-concat.ll | 6 ; WIN64: movss 12(%rcx), %xmm0
|
| sse-load-ret.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
|
| vec_set-G.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
|
| reghinting.ll | 10 ; CHECK: movss
11 ; CHECK-NEXT: movss
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| long-1.s | 17 movss (%eax), %xmm0 label
30 movss (%eax), %xmm0 label
|
| x86-64-long-1.s | 17 movss (%rax), %xmm0 label
30 movss (%rax), %xmm0 label
|
| x86-64-avx-swap.s | 22 movss %xmm8,%xmm6
54 movss xmm6,xmm8
|
| /external/llvm/test/CodeGen/X86/ |
| vector-variable-idx.ll | 1 ; RUN: llc < %s -march=x86-64 | grep movss | count 2
|
| sse-fcopysign.ll | 10 ; X32: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
11 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
12 ; X32-NEXT: movss %xmm1, 4(%esp)
13 ; X32-NEXT: movss %xmm0, (%esp)
30 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
58 ; X32: movss 8(%esp), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zero
60 ; X32-NEXT: movss 12(%esp), %xmm1 {{.*#+}} xmm1 = mem[0],zero,zero,zero
63 ; X32-NEXT: movss %xmm1, (%esp)
79 ; X32: movss 16(%ebp), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zero
112 ; X64: movss .LCPI4_0(%rip), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zer
[all...] |
| uint_to_fp-2.ll | 15 ; CHECK-NEXT: movss %xmm0, (%esp)
30 ; CHECK-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
36 ; CHECK-NEXT: movss %xmm0, (%esp)
|
| sse-load-ret.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
|
| reghinting.ll | 10 ; CHECK: movss
11 ; CHECK-NEXT: movss
|
| uint_to_fp.ll | 13 ; X32-NEXT: movss %xmm0, (%eax)
20 ; X64-NEXT: movss %xmm0, (%rsi)
|
| vec_extract-sse4.ll | 10 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
11 ; X32-NEXT: movss %xmm0, (%eax)
16 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
17 ; X64-NEXT: movss %xmm0, (%rdi)
31 ; X32-NEXT: movss %xmm0, (%esp)
|
| /art/runtime/interpreter/mterp/x86_64/ |
| fpcvt.S | 14 movss %xmm0, VREG_ADDRESS(%rcx)
|
| /external/compiler-rt/lib/builtins/i386/ |
| floatundixf.S | 31 movss 8(%esp), %xmm0 // hi 32 bits of input
32 movss 4(%esp), %xmm1 // lo 32 bits of input
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| address-mode-opt.ll | 16 ; CHECK: movss xmm0,DWORD PTR [eax+0x30d40]
27 ; CHECK: movss xmm0,DWORD PTR [eax+0x30d40]
38 ; CHECK: movss xmm0,DWORD PTR [eax-0x30d40]
49 ; CHECK: movss xmm0,DWORD PTR [e{{..}}]
89 ; CHECK: movss xmm0,DWORD PTR [eax+0x8]
102 ; CHECK: movss xmm0,DWORD PTR [{{.*}}+0x7ffffffb]
115 ; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x7ffffffb]
127 ; CHECK: movss xmm0,DWORD PTR [{{.*}}+0x3]
138 ; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x80000000]
149 ; CHECK: movss xmm0,DWORD PTR [{{.*}}-0x80000000
[all...] |
