/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
fpr-names.s | 10 mtc1 $0, $f0 11 mtc1 $0, $f1 12 mtc1 $0, $f2 13 mtc1 $0, $f3 14 mtc1 $0, $f4 15 mtc1 $0, $f5 16 mtc1 $0, $f6 17 mtc1 $0, $f7 18 mtc1 $0, $f8 19 mtc1 $0, $f [all...] |
fpr-names-32.d | 10 0+0000 <[^>]*> 44800000 mtc1 \$0,fv0 11 0+0004 <[^>]*> 44800800 mtc1 \$0,fv0f 12 0+0008 <[^>]*> 44801000 mtc1 \$0,fv1 13 0+000c <[^>]*> 44801800 mtc1 \$0,fv1f 14 0+0010 <[^>]*> 44802000 mtc1 \$0,ft0 15 0+0014 <[^>]*> 44802800 mtc1 \$0,ft0f 16 0+0018 <[^>]*> 44803000 mtc1 \$0,ft1 17 0+001c <[^>]*> 44803800 mtc1 \$0,ft1f 18 0+0020 <[^>]*> 44804000 mtc1 \$0,ft2 19 0+0024 <[^>]*> 44804800 mtc1 \$0,ft2 [all...] |
fpr-names-64.d | 10 0+0000 <[^>]*> 44800000 mtc1 \$0,fv0 11 0+0004 <[^>]*> 44800800 mtc1 \$0,ft12 12 0+0008 <[^>]*> 44801000 mtc1 \$0,fv1 13 0+000c <[^>]*> 44801800 mtc1 \$0,ft13 14 0+0010 <[^>]*> 44802000 mtc1 \$0,ft0 15 0+0014 <[^>]*> 44802800 mtc1 \$0,ft1 16 0+0018 <[^>]*> 44803000 mtc1 \$0,ft2 17 0+001c <[^>]*> 44803800 mtc1 \$0,ft3 18 0+0020 <[^>]*> 44804000 mtc1 \$0,ft4 19 0+0024 <[^>]*> 44804800 mtc1 \$0,ft [all...] |
fpr-names-n32.d | 10 0+0000 <[^>]*> 44800000 mtc1 \$0,fv0 11 0+0004 <[^>]*> 44800800 mtc1 \$0,ft14 12 0+0008 <[^>]*> 44801000 mtc1 \$0,fv1 13 0+000c <[^>]*> 44801800 mtc1 \$0,ft15 14 0+0010 <[^>]*> 44802000 mtc1 \$0,ft0 15 0+0014 <[^>]*> 44802800 mtc1 \$0,ft1 16 0+0018 <[^>]*> 44803000 mtc1 \$0,ft2 17 0+001c <[^>]*> 44803800 mtc1 \$0,ft3 18 0+0020 <[^>]*> 44804000 mtc1 \$0,ft4 19 0+0024 <[^>]*> 44804800 mtc1 \$0,ft [all...] |
fpr-names-numeric.d | 10 0+0000 <[^>]*> 44800000 mtc1 \$0,\$f0 11 0+0004 <[^>]*> 44800800 mtc1 \$0,\$f1 12 0+0008 <[^>]*> 44801000 mtc1 \$0,\$f2 13 0+000c <[^>]*> 44801800 mtc1 \$0,\$f3 14 0+0010 <[^>]*> 44802000 mtc1 \$0,\$f4 15 0+0014 <[^>]*> 44802800 mtc1 \$0,\$f5 16 0+0018 <[^>]*> 44803000 mtc1 \$0,\$f6 17 0+001c <[^>]*> 44803800 mtc1 \$0,\$f7 18 0+0020 <[^>]*> 44804000 mtc1 \$0,\$f8 19 0+0024 <[^>]*> 44804800 mtc1 \$0,\$f [all...] |
fpxx-oddfpreg.s | 0 mtc1 $4, $f1 1 mtc1 $4, $f1 label
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delay.s | 3 mtc1 $0,$f0 5 mtc1 $0,$f2
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li-d.d | 14 [0-9a-f]+ <[^>]*> mtc1 at,\$f1 15 [0-9a-f]+ <[^>]*> mtc1 zero,\$f0 17 [0-9a-f]+ <[^>]*> mtc1 at,\$f1 18 [0-9a-f]+ <[^>]*> mtc1 zero,\$f0 22 [0-9a-f]+ <[^>]*> mtc1 zero,\$f0 25 [0-9a-f]+ <[^>]*> mtc1 zero,\$f0 28 [0-9a-f]+ <[^>]*> mtc1 zero,\$f0
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delay.d | 6 # Gas should produce nop's after mtc1 and related 14 0+0000 <[^>]*> mtc1 zero,\$f0 17 0+000c <[^>]*> mtc1 zero,\$f2
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nodelay.d | 7 # Gas should *not* produce nop's after mtc1 and related 15 0+0000 <[^>]*> mtc1 zero,\$f0 17 0+0008 <[^>]*> mtc1 zero,\$f2
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fpxx-oddfpreg.d | 9 [ 0-9a-f]+: 44840800 mtc1 a0,\$f1
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/external/valgrind/none/tests/mips64/ |
move_instructions.stdout.exp-BE | 0 mtc1, mov.s, mfc1 :: mem: 0x0 out: 0x0 3 mtc1, mov.s, mfc1 :: mem: 0x12bd6aa out: 0x12bd6aa 5 mtc1, mov.s, mfc1 :: mem: 0x0 out: 0x0 7 mtc1, mov.s, mfc1 :: mem: 0x7e876382d2ab13 out: 0xffffffff82d2ab13 9 mtc1, mov.s, mfc1 :: mem: 0x9823b6e out: 0x9823b6e 11 mtc1, mov.s, mfc1 :: mem: 0x976d6e9ac31510f3 out: 0xffffffffc31510f3 13 mtc1, mov.s, mfc1 :: mem: 0xd4326d9 out: 0xd4326d9 15 mtc1, mov.s, mfc1 :: mem: 0xb7746d775ad6a5fb out: 0x5ad6a5fb 17 mtc1, mov.s, mfc1 :: mem: 0x130476dc out: 0x130476dc 19 mtc1, mov.s, mfc1 :: mem: 0x42b0c0a28677b502 out: 0xffffffff8677b50 [all...] |
move_instructions.stdout.exp-LE | 0 mtc1, mov.s, mfc1 :: mem: 0x0 out: 0x0 3 mtc1, mov.s, mfc1 :: mem: 0x12bd6aa out: 0x12bd6aa 5 mtc1, mov.s, mfc1 :: mem: 0x0 out: 0x0 7 mtc1, mov.s, mfc1 :: mem: 0x7e876382d2ab13 out: 0xffffffff82d2ab13 9 mtc1, mov.s, mfc1 :: mem: 0x9823b6e out: 0x9823b6e 11 mtc1, mov.s, mfc1 :: mem: 0x976d6e9ac31510f3 out: 0xffffffffc31510f3 13 mtc1, mov.s, mfc1 :: mem: 0xd4326d9 out: 0xd4326d9 15 mtc1, mov.s, mfc1 :: mem: 0xb7746d775ad6a5fb out: 0x5ad6a5fb 17 mtc1, mov.s, mfc1 :: mem: 0x130476dc out: 0x130476dc 19 mtc1, mov.s, mfc1 :: mem: 0x42b0c0a28677b502 out: 0xffffffff8677b50 [all...] |
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
buildpairextractelementf64.ll | 7 ; CHECK: mtc1 8 ; CHECK: mtc1
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constantfp0.ll | 5 ; CHECK: mtc1 $zero, $f[[R0:[0-9]+]]
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/external/llvm/test/CodeGen/Mips/ |
2008-08-04-Bitconvert.ll | 5 ; CHECK: mtc1
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2013-11-18-fp64-const0.ll | 13 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[02468]}} 14 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[13579]}} 16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}} 17 ; CHECK-FP64-NOT: mtc1 $zero,
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constantfp0.ll | 5 ; CHECK: mtc1 $zero, $f[[R0:[0-9]+]]
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fpxx.ll | 29 ; 32-NOFPXX: mtc1 $4, $f0 30 ; 32-NOFPXX: mtc1 $5, $f1 37 ; 32R2-NOFPXX: mtc1 $4, $f0 40 ; 32R2-FPXX: mtc1 $4, $f0 54 ; 32-NOFPXX: mtc1 $6, $f0 55 ; 32-NOFPXX: mtc1 $7, $f1 62 ; 32R2-NOFPXX: mtc1 $6, $f0 65 ; 32R2-FPXX: mtc1 $6, $f0 78 ; 32-NOFPXX: mtc1 $6, $f0 79 ; 32-NOFPXX: mtc1 $7, $f [all...] |
fmadd1.ll | 25 ; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]] 28 ; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]] 31 ; 32R2: mtc1 $6, $[[T0:f[0-9]+]] 33 ; 32R2: mtc1 $zero, $[[T2:f[0-9]+]] 36 ; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]] 39 ; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]] 43 ; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]] 47 ; 64R2: mtc1 $zero, $[[T1:f[0-9]+]] 52 ; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]] 65 ; 32-DAG: mtc1 $6, $[[T0:f[0-9]+] [all...] |
buildpairextractelementf64.ll | 12 ; NO-MFHC1: mtc1 13 ; NO-MFHC1: mtc1 15 ; HAS-MFHC1-DAG: mtc1
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/art/runtime/interpreter/mterp/mips/ |
op_float_to_int.S | 17 mtc1 t0, fa1 24 mtc1 zero, fa0
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op_double_to_int.S | 17 mtc1 zero, fa1 25 mtc1 zero, fa0
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
mips16-pic-3.dd | 122 .*: 44846000 mtc1 a0,\$f12 128 .*: 44846000 mtc1 a0,\$f12 134 .*: 44846000 mtc1 a0,\$f12 140 .*: 44846000 mtc1 a0,\$f12 147 .*: 44846000 mtc1 a0,\$f12 157 .*: 44846000 mtc1 a0,\$f12 167 .*: 44846000 mtc1 a0,\$f12 177 .*: 44846000 mtc1 a0,\$f12 186 .*: 44846000 mtc1 a0,\$f12 192 .*: 44846000 mtc1 a0,\$f1 [all...] |
mips16-pic-3.inc | 17 mtc1 $4,$f12 31 mtc1 $4,$f12
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