| /external/llvm/test/CodeGen/AMDGPU/ |
| call_fs.ll | 2 ; RUN: llc < %s -march=r600 -mcpu=redwood -show-mc-encoding -o - | FileCheck --check-prefix=EG %s
3 ; RUN: llc < %s -march=r600 -mcpu=rv710 -show-mc-encoding -o - | FileCheck --check-prefix=R600 %s
8 ; R600: .long 257
9 ; R600: {{^}}call_fs:
10 ; R600:CALL_FS ; encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x89]
|
| build_vector.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600
5 ; R600: {{^}}build_vector2:
6 ; R600: MOV
7 ; R600: MOV
8 ; R600-NOT: MOV
19 ; R600: {{^}}build_vector4:
20 ; R600: MOV
21 ; R600: MOV
22 ; R600: MO
[all...] |
| reciprocal.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
9 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
13 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| fadd.ll | 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
6 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
15 ; R600-DAG: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[3].X, KC0[3].Z
16 ; R600-DAG: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y
26 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
29 ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
44 ; R600: AD
[all...] |
| wrong-transalu-pos-fix.ll | 1 ; RUN: llc -march=r600 -mcpu=redwood -mtriple=r600-- < %s | FileCheck %s
9 %x.i = tail call i32 @llvm.r600.read.global.size.x() #1
10 %y.i18 = tail call i32 @llvm.r600.read.global.size.y() #1
12 %z.i17 = tail call i32 @llvm.r600.read.global.size.z() #1
14 %x.i.i = tail call i32 @llvm.r600.read.tgid.x() #1
15 %x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1
17 %x.i4.i = tail call i32 @llvm.r600.read.tidig.x() #1
20 %y.i.i = tail call i32 @llvm.r600.read.tgid.y() #1
21 %y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #
[all...] |
| infinite-loop-evergreen.ll | 2 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck %s
|
| unknown-processor.ll | 2 ; RUN: llc -march=r600 -mcpu=unknown < %s 2>&1 | FileCheck -check-prefix=ERROR -check-prefix=R600 %s
7 ; Should also not have fragments of r600 and gcn isa mixed.
15 ; R600: MOV
|
| r600-encoding.ll | 1 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=redwood | FileCheck --check-prefix=EG %s
2 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rs880 | FileCheck --check-prefix=R600 %s
4 ; The earliest R600 GPUs have a slightly different encoding than the rest of
10 ; R600: {{^}}test:
11 ; R600: MUL_IEEE {{[ *TXYZWPVxyzw.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x10,0x02,0x[0-9a-f]+,0x[0-9a-f]+}}]
19 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
23 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| r600.private-memory.ll | 1 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
3 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
9 ; R600-NOT: MOV T0.X
11 ; R600-NOT: MOV * TO.X
22 %5 = call i32 @llvm.r600.read.tidig.x()
|
| annotate-kernel-features.ll | 3 declare i32 @llvm.r600.read.tgid.x() #0
4 declare i32 @llvm.r600.read.tgid.y() #0
5 declare i32 @llvm.r600.read.tgid.z() #0
7 declare i32 @llvm.r600.read.tidig.x() #0
8 declare i32 @llvm.r600.read.tidig.y() #0
9 declare i32 @llvm.r600.read.tidig.z() #0
11 declare i32 @llvm.r600.read.local.size.x() #0
12 declare i32 @llvm.r600.read.local.size.y() #0
13 declare i32 @llvm.r600.read.local.size.z() #0
17 %val = call i32 @llvm.r600.read.tgid.x(
[all...] |
| bfi_int.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 %s
8 ; R600: {{^}}bfi_def:
9 ; R600: BFI_INT
24 ; R600: {{^}}bfi_sha256_ch:
25 ; R600: BFI_INT
39 ; R600: {{^}}bfi_sha256_ma:
40 ; R600: XOR_INT * [[DST:T[0-9]+\.[XYZW]]], KC0[2].Z, KC0[2].W
41 ; R600: BFI_INT * {{T[0-9]+\.[XYZW]}}, {{[[DST]]|PV\.[XYZW]}}, KC0[3].X, KC0[2].W
|
| llvm.rint.ll | 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
6 ; R600: RNDNE
17 ; R600: RNDNE
18 ; R600: RNDNE
30 ; R600: RNDNE
31 ; R600: RNDNE
32 ; R600: RNDNE
33 ; R600: RNDNE
|
| rotr.ll | 1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
6 ; R600: BIT_ALIGN_INT
20 ; R600: BIT_ALIGN_INT
21 ; R600: BIT_ALIGN_INT
36 ; R600: BIT_ALIGN_INT
37 ; R600: BIT_ALIGN_INT
38 ; R600: BIT_ALIGN_INT
39 ; R600: BIT_ALIGN_INT
|
| llvm.AMDGPU.barrier.global.ll | 2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
12 %0 = call i32 @llvm.r600.read.tidig.x()
16 %2 = call i32 @llvm.r600.read.local.size.x()
27 declare i32 @llvm.r600.read.tidig.x() #0
28 declare i32 @llvm.r600.read.local.size.x() #0
|
| llvm.AMDGPU.barrier.local.ll | 2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
13 %0 = call i32 @llvm.r600.read.tidig.x()
17 %2 = call i32 @llvm.r600.read.local.size.x()
28 declare i32 @llvm.r600.read.tidig.x() #0
29 declare i32 @llvm.r600.read.local.size.x() #0
|
| predicate-dp4.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman
14 %4 = call float @llvm.r600.dot4(<4 x float> %0, <4 x float> %0)
20 call void @llvm.R600.store.swizzle(<4 x float> %6, i32 0, i32 0)
24 declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #1
25 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| store_typed.ll | 1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=cayman < %s | FileCheck --check-prefix=CM --check-prefix=FUNC %s
10 call void @llvm.r600.rat.store.typed(<4 x i32> %data, <4 x i32> %index, i32 0)
20 call void @llvm.r600.rat.store.typed(<4 x i32> %data, <4 x i32> %index, i32 11)
24 declare void @llvm.r600.rat.store.typed(<4 x i32>, <4 x i32>, i32)
|
| uint_to_fp.ll | 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
8 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z
18 ; R600: INT_TO_FLT
20 %tid = call i32 @llvm.r600.read.tidig.x()
33 ; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W
34 ; R600-DAG: UINT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X
48 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
49 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
50 ; R600: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}
[all...] |
| r600.work-item-intrinsics.ll | 1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
7 %0 = call i32 @llvm.r600.read.tgid.x() #0
16 %0 = call i32 @llvm.r600.read.tgid.y() #0
25 %0 = call i32 @llvm.r600.read.tgid.z() #0
34 %0 = call i32 @llvm.r600.read.tidig.x() #0
43 %0 = call i32 @llvm.r600.read.tidig.y() #0
52 %0 = call i32 @llvm.r600.read.tidig.z() #0
61 %implicitarg.ptr = call noalias i8 addrspace(7)* @llvm.r600.implicitarg.ptr()
73 %implicitarg.ptr = call noalias i8 addrspace(7)* @llvm.r600.implicitarg.ptr()
83 ; DEPRECATED but R600 onl
[all...] |
| cf_end.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood --show-mc-encoding | FileCheck --check-prefix=EG %s
2 ; RUN: llc < %s -march=r600 -mcpu=caicos --show-mc-encoding | FileCheck --check-prefix=EG %s
3 ; RUN: llc < %s -march=r600 -mcpu=cayman --show-mc-encoding | FileCheck --check-prefix=CM %s
|
| complex-folding.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
12 call void @llvm.R600.store.swizzle(<4 x float> %4, i32 0, i32 0)
17 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| floor.ll | 1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s
8 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
13 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| fmax.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
11 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
15 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| Automake.inc | 3 TARGET_DRIVERS += r600
6 $(top_builddir)/src/gallium/drivers/r600/libr600.la \
|
| /external/clang/test/CodeGenOpenCL/ |
| builtins-r600.cl | 2 // RUN: %clang_cc1 -triple r600-unknown-unknown -target-cpu cypress -S -emit-llvm -o - %s | FileCheck %s
5 // CHECK: call float @llvm.r600.rsq.f32
13 // XCHECK: call double @llvm.r600.rsq.f64
37 // CHECK: call i8 addrspace(7)* @llvm.r600.implicitarg.ptr()
44 // CHECK: tail call i32 @llvm.r600.read.tgid.x()
45 // CHECK: tail call i32 @llvm.r600.read.tgid.y()
46 // CHECK: tail call i32 @llvm.r600.read.tgid.z()
58 // CHECK: tail call i32 @llvm.r600.read.tidig.x(), !range [[WI_RANGE:![0-9]*]]
59 // CHECK: tail call i32 @llvm.r600.read.tidig.y(), !range [[WI_RANGE]]
60 // CHECK: tail call i32 @llvm.r600.read.tidig.z(), !range [[WI_RANGE]
[all...] |
