/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
residu_asm_opt.s | 89 SMLATB r11, r6, r2, r11 @i3(2) --- r11 += x[0] * a2 99 SMLATB r3, r6, r2, r3 @i1(2) --- r3 += x[-2] * a2 102 SMLATB r11,r7, r2, r11 @ i3 (4) 110 SMLATB r3, r7, r2, r3 @ i1 (4) 112 SMLATB r11,r8, r2, r11 @ i3 (6) 120 SMLATB r3, r8, r2, r3 @ i1 (6) 122 SMLATB r11,r9, r2, r11 @ i3 (8) 131 SMLATB r3, r9, r2, r3 @ i1 (8) 133 SMLATB r11,r10, r2, r11 @ i3 (10) 142 SMLATB r3, r10, r2, r3 @ i1 (10 [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
el_segundo.s | 10 smlatb r0,r1,r2,r3
|
el_segundo.d | 9 0+08 <[^>]+> e10032a1 smlatb r0, r1, r2, r3
|
arch7em.s | 79 smlatb r0, r0, r0, r0
|
arch7em-bad.l | 68 [^:]*:79: Error: selected processor does not support Thumb mode `smlatb r0,r0,r0,r0'
|
arch7em.d | 75 0[0-9a-f]+ <[^>]+> fb10 0020 smlatb r0, r0, r0, r0
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
h264bsd_interpolate_hor_half.s | 169 SMLATB tmp3, x_2_0, mult_20_01, plus16 170 SMLATB tmp2, x_2_0, mult_20_m5, plus16 171 SMLATB tmp4, x_3_1, mult_20_01, plus16 174 SMLATB tmp3, x_3_1, mult_20_m5, tmp3 205 SMLATB tmp3, x_6_4, mult_20_01, plus16 206 SMLATB tmp2, x_6_4, mult_20_m5, plus16 207 SMLATB tmp4, x_7_5, mult_20_01, plus16 210 SMLATB tmp3, x_7_5, mult_20_m5, tmp3
|
h264bsd_interpolate_hor_quarter.s | 171 SMLATB tmp3, x_2_0, mult_20_01, plus16 172 SMLATB tmp2, x_2_0, mult_20_m5, plus16 173 SMLATB tmp4, x_3_1, mult_20_01, plus16 176 SMLATB tmp3, x_3_1, mult_20_m5, tmp3 217 SMLATB tmp3, x_6_4, mult_20_01, plus16 218 SMLATB tmp2, x_6_4, mult_20_m5, plus16 219 SMLATB tmp4, x_7_5, mult_20_01, plus16 222 SMLATB tmp3, x_7_5, mult_20_m5, tmp3
|
h264bsd_interpolate_hor_ver_quarter.s | 187 SMLATB tmp6, x_2_0, mult_20_01, plus16 188 SMLATB tmp5, x_2_0, mult_20_m5, plus16 189 SMLATB tmpa, x_3_1, mult_20_01, plus16 192 SMLATB tmp6, x_3_1, mult_20_m5, tmp6 223 SMLATB tmp6, x_6_4, mult_20_01, plus16 224 SMLATB tmp5, x_6_4, mult_20_m5, plus16 225 SMLATB tmpa, x_7_5, mult_20_01, plus16 228 SMLATB tmp6, x_7_5, mult_20_m5, tmp6
|
h264bsd_interpolate_mid_hor.s | 100 SMLATB tmp3, x_3_1, mult_20_m5, tmp3
131 SMLATB tmp3, x_7_5, mult_20_m5, tmp3
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
omxVCM4P10_TransformDequantLumaDCFromPair_s.s | 367 SMLATB temp2, colOp00, Scale, Round ;// Temp2 = T(c0w0) * Scale + Round 368 SMLATB temp4, colOp02, Scale, Round ;// Temp4 = T(c1w0) * Scale + Round 379 SMLATB temp2, colOp10, Scale, Round ;// Temp2 = T(c0w0) * Scale + Round 380 SMLATB temp4, colOp12, Scale, Round ;// Temp4 = T(c1w0) * Scale + Round 390 SMLATB temp2, colOp20, Scale, Round ;// Temp2 = T(c0w0) * Scale + Round 391 SMLATB temp4, colOp22, Scale, Round ;// Temp4 = T(c1w0) * Scale + Round 401 SMLATB temp2, colOp30, Scale, Round ;// Temp2 = T(c0w0) * Scale + Round 402 SMLATB temp4, colOp32, Scale, Round ;// Temp4 = T(c1w0) * Scale + Round
|
armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.s | 264 SMLATB Acc1, ValCA, r0x0014fffb, Acc1 ;// Acc1 += [0 d 0 b] * [0 0 0 -5] 265 SMLATB Acc2, ValCA, r0x00140001, Acc2 ;// Acc2 += [0 c 0 a] * [0 0 0 1] 266 SMLATB Acc3, ValDB, r0x00140001, Acc3 ;// Acc3 += [0 c 0 a] * [0 0 0 1] 271 SMLATB Acc2, ValDB, r0x0014fffb, Acc2 ;// Acc2 += [0 d 0 b] * [0 0 0 -5]
|
armVCM4P10_InterpolateLuma_HalfDiagVerHor4x4_unsafe_s.s | 248 SMLATB Acc1, ValCA, r0x0014fffb, Acc1 ;// Acc1 += [0 d 0 b] * [0 0 0 -5] 249 SMLATB Acc2, ValCA, r0x00140001, Acc2 ;// Acc2 += [0 c 0 a] * [0 0 0 1] 250 SMLATB Acc3, ValDB, r0x00140001, Acc3 ;// Acc3 += [0 c 0 a] * [0 0 0 1] 255 SMLATB Acc2, ValDB, r0x0014fffb, Acc2 ;// Acc2 += [0 d 0 b] * [0 0 0 -5]
|
/external/libopus/celt/arm/ |
celt_pitch_xcorr_arm_gnu.s | 296 SMLATB r7, r12, r11, r7 @ sum[1] = MAC16_16(sum[1],x_1,y_2) 298 SMLATB r9, r12, r10, r9 @ sum[3] = MAC16_16(sum[3],x_1,y_4) 306 SMLATB r7, r14, r10, r7 @ sum[1] = MAC16_16(sum[1],x_3,y_4) 308 SMLATB r9, r14, r11, r9 @ sum[3] = MAC16_16(sum[3],x_3,y_6) 384 SMLATB r14, r6, r9, r14 @ sum = MAC16_16(sum, x_1, y_1) 388 SMLATB r14, r7, r8, r14 @ sum = MAC16_16(sum, x_3, y_3) 457 SMLATB r11, r6, r9, r11 @ sum1 = MAC16_16(sum1, x_1, y_2) 463 SMLATB r11, r7, r8, r11 @ sum1 = MAC16_16(sum1, x_3, y_4) 476 SMLATB r11, r6, r9, r11 @ sum1 = MAC16_16(sum1, x_1, y_2)
|
/external/webrtc/webrtc/common_audio/signal_processing/ |
filter_ar_fast_q12_armv7.S | 66 smlatb r7, r10, r5, r7 @ sum1 += coefficients[j] * data_out[i - j]; 82 smlatb r7, r10, r5, r7 @ sum1 += coefficients[1] * data_out[i - 1]; 95 smlatb r8, r10, r6, r8 @ sum2 += coefficients[1] * data_out[i]; 125 smlatb r7, r10, r5, r7 @ sum1 += coefficients[j] * data_out[i - j];
|
/external/arm-neon-tests/ |
ref_dsp.c | 289 /* smlabb, smlabt, smlatb, smlatt */ 298 sres = smlatb(svar1, svar2, sacc); 299 fprintf(ref_file, "smlatb(%#x, %#x, %#x) = %#x\n", svar1, svar2, sacc, sres); 309 sres = smlatb(svar1, svar2, sacc); 310 fprintf(ref_file, "smlatb(%#x, %#x, %#x) = %#x\n", svar1, svar2, sacc, sres);
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
armCOMM_s.h | 966 LIBI4 SMLABT, SMLATB, $a, $b, $c, $d, $cc 971 LIBI4 SMLABB, SMLATB, $a, $b, $c, $d, $cc 981 LIBI4 SMLATB, SMLABT, $a, $b, $c, $d, $cc 991 LIBI4 SMLATB, SMLABB, $a, $b, $c, $d, $cc 1011 LIBI4 SMLATB, SMLATT, $a, $b, $c, $d, $cc 1016 LIBI4 SMLATT, SMLATB, $a, $b, $c, $d, $cc
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
armCOMM_s.h | 969 LIBI4 SMLABT, SMLATB, $a, $b, $c, $d, $cc 974 LIBI4 SMLABB, SMLATB, $a, $b, $c, $d, $cc 984 LIBI4 SMLATB, SMLABT, $a, $b, $c, $d, $cc 994 LIBI4 SMLATB, SMLABB, $a, $b, $c, $d, $cc 1014 LIBI4 SMLATB, SMLATT, $a, $b, $c, $d, $cc 1019 LIBI4 SMLATT, SMLATB, $a, $b, $c, $d, $cc
|
/external/valgrind/none/tests/arm/ |
v6media.c | [all...] |
v6media.stdout.exp | [all...] |
/external/vixl/src/aarch32/ |
constants-aarch32.cc | 330 return "smlatb";
|
/system/core/libpixelflinger/codeflinger/ |
ARMAssemblerInterface.h | 307 SMLATB(int cc, int Rd, int Rm, int Rs, int Rn) {
|
/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
tables.go | 1778 SMLATB [all...] |
/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
tables.go | 1778 SMLATB [all...] |
/prebuilts/go/darwin-x86/pkg/darwin_amd64/cmd/vendor/golang.org/x/arch/arm/ |
armasm.a | 1081 LDRSH_EQ @%?LDRSH_NE @%?LDRSH_CS @%?LDRSH_CC @%?LDRSH_MI @%?LDRSH_PL @%?LDRSH_VS @%?LDRSH_VC @%?LDRSH_HI @%?LDRSH_LS @%?LDRSH_GE @%?LDRSH_LT @%?LDRSH_GT @%?LDRSH_LE @%? LDRSH @%?LDRSH_ZZ @%?LDRSHT_EQ @%?LDRSHT_NE @%?LDRSHT_CS @%?LDRSHT_CC @%?LDRSHT_MI @%?LDRSHT_PL @%?LDRSHT_VS @%?LDRSHT_VC @%?LDRSHT_HI @%?LDRSHT_LS @%?LDRSHT_GE @%?LDRSHT_LT @%?LDRSHT_GT @%?LDRSHT_LE @%?LDRSHT @%?LDRSHT_ZZ @%?
LDRT_EQ @%?
LDRT_NE @%?
LDRT_CS @%?
LDRT_CC @%?
LDRT_MI @%?
LDRT_PL @%?
LDRT_VS @%?
LDRT_VC @%?
LDRT_HI @%?
LDRT_LS @%?
LDRT_GE @%?
LDRT_LT @%?
LDRT_GT @%?
LDRT_LE @%?LDRT @%?
LDRT_ZZ @%?LSL_EQ @%?LSL_NE @%?LSL_CS @%?LSL_CC @%?LSL_MI @%?LSL_PL @%?LSL_VS @%?LSL_VC @%?LSL_HI @%?LSL_LS @%?LSL_GE @%?LSL_LT @%?LSL_GT @%?LSL_LE @%?LSL @%?LSL_ZZ @%?LSL_S_EQ @%?LSL_S_NE @%?LSL_S_CS @%?LSL_S_CC @%?LSL_S_MI @%?LSL_S_PL @%?LSL_S_VS @%?LSL_S_VC @%?LSL_S_HI @%?LSL_S_LS @%?LSL_S_GE @%?LSL_S_LT @%?LSL_S_GT @%?LSL_S_LE @%? LSL_S @%?LSL_S_ZZ @%?LSR_EQ @%?LSR_NE @%?LSR_CS @%?LSR_CC @%?LSR_MI @%?LSR_PL @%?LSR_VS @%?LSR_VC @%?LSR_HI @%?LSR_LS @%?LSR_GE @%?LSR_LT @%?LSR_GT @%?LSR_LE @%?LSR @%?LSR_ZZ @%?LSR_S_EQ @%?LSR_S_NE @%?LSR_S_CS @%?LSR_S_CC @%?LSR_S_MI @%?LSR_S_PL @%?LSR_S_VS @%?LSR_S_VC @%?LSR_S_HI @%?LSR_S_LS @%?LSR_S_GE @%?LSR_S_LT @%?LSR_S_GT @%?LSR_S_LE @%? LSR_S @%?LSR_S_ZZ @%?MLA_EQ @%?MLA_NE @%?MLA_CS @%?MLA_CC @%?MLA_MI @%?MLA_PL @%?MLA_VS @%?MLA_VC @%?MLA_HI @%?MLA_LS @%?MLA_GE @%?MLA_LT @%?MLA_GT @%?MLA_LE @%?MLA @%?MLA_ZZ @%?MLA_S_EQ @%?
MLA_S_NE @%?
MLA_S_CS @%?
MLA_S_CC @%?
MLA_S_MI @%?
MLA_S_PL @%?
MLA_S_VS @%?
MLA_S_VC @%?
MLA_S_HI @%?
MLA_S_LS @%?
MLA_S_GE @%?
MLA_S_LT @%?
MLA_S_GT @%?
MLA_S_LE @%?
MLA_S @%?
MLA_S_ZZ @%?
MLS_EQ @%?
MLS_NE @%?
MLS_CS @%?
MLS_CC @%?
MLS_MI @%?
MLS_PL @%?
MLS_VS @%?
MLS_VC @%?
MLS_HI @%?
MLS_LS @%?
MLS_GE @%?
MLS_LT @%?
MLS_GT @%?
MLS_LE @%?
MLS @%?
MLS_ZZ @%?
MOV_EQ @%?
MOV_NE @%?
MOV_CS @%?
MOV_CC @%?
MOV_MI @%?
MOV_PL @%?
MOV_VS @%?
MOV_VC @%?
MOV_HI @%?
MOV_LS @%?
MOV_GE @%?
MOV_LT @%?
MOV_GT @%?
MOV_LE @%?
MOV @%?
MOV_ZZ @%?
MOV_S_EQ @%?
MOV_S_NE @%?
MOV_S_CS @%?
MOV_S_CC @%?
MOV_S_MI @%?
MOV_S_PL @%?
MOV_S_VS @%?
MOV_S_VC @%?
MOV_S_HI @%?
MOV_S_LS @%?
MOV_S_GE @%?
MOV_S_LT @%?
MOV_S_GT @%?
MOV_S_LE @%?
MOV_S @%?
MOV_S_ZZ @%?
MOVT_EQ @%?
MOVT_NE @%?
MOVT_CS @%?
MOVT_CC @%?
MOVT_MI @%?
MOVT_PL @%?
MOVT_VS @%?
MOVT_VC @%?
MOVT_HI @%?
MOVT_LS @%?
MOVT_GE @%?
MOVT_LT @%?
MOVT_GT @%?
MOVT_LE @%?MOVT @%?
MOVT_ZZ @%?
MOVW_EQ @%?
MOVW_NE @%?
MOVW_CS @%?
MOVW_CC @%?
MOVW_MI @%?
MOVW_PL @%?
MOVW_VS @%?
MOVW_VC @%?
MOVW_HI @%?
MOVW_LS @%?
MOVW_GE @%?
MOVW_LT @%?
MOVW_GT @%?
MOVW_LE @%?MOVW @%?
MOVW_ZZ @%?MRS_EQ @%?MRS_NE @%?MRS_CS @%?MRS_CC @%?MRS_MI @%?MRS_PL @%?MRS_VS @%?MRS_VC @%?MRS_HI @%?MRS_LS @%?MRS_GE @%?MRS_LT @%?MRS_GT @%?MRS_LE @%?MRS @%?MRS_ZZ @%?MUL_EQ @%?MUL_NE @%?MUL_CS @%?MUL_CC @%?MUL_MI @%?MUL_PL @%?MUL_VS @%?MUL_VC @%?MUL_HI @%?MUL_LS @%?MUL_GE @%?MUL_LT @%?MUL_GT @%?MUL_LE @%?MUL @%?MUL_ZZ @%?MUL_S_EQ @%?MUL_S_NE @%?MUL_S_CS @%?MUL_S_CC @%?MUL_S_MI @%?MUL_S_PL @%?MUL_S_VS @%?MUL_S_VC @%?MUL_S_HI @%?MUL_S_LS @%?MUL_S_GE @%?MUL_S_LT @%?MUL_S_GT @%?MUL_S_LE @%? MUL_S @%?MUL_S_ZZ @%?MVN_EQ @%?MVN_NE @%?MVN_CS @%?MVN_CC @%?MVN_MI @%?MVN_PL @%?MVN_VS @%?MVN_VC @%?MVN_HI @%?MVN_LS @%?MVN_GE @%?MVN_LT @%?MVN_GT @%?MVN_LE @%?MVN @%?MVN_ZZ @%?MVN_S_EQ @%?MVN_S_NE @%?MVN_S_CS @%?MVN_S_CC @%?MVN_S_MI @%?MVN_S_PL @%?MVN_S_VS @%?MVN_S_VC @%?MVN_S_HI @%?MVN_S_LS @%?MVN_S_GE @%?MVN_S_LT @%?MVN_S_GT @%?MVN_S_LE @%? MVN_S @%?MVN_S_ZZ @%?NOP_EQ @%?NOP_NE @%?NOP_CS @%?NOP_CC @%?NOP_MI @%?NOP_PL @%?NOP_VS @%?NOP_VC @%?NOP_HI @%?NOP_LS @%?NOP_GE @%?NOP_LT @%?NOP_GT @%?NOP_LE @%?NOP @%?NOP_ZZ @%?ORR_EQ @%?ORR_NE @%?ORR_CS @%?ORR_CC @%?ORR_MI @%?ORR_PL @%?ORR_VS @%?ORR_VC @%?ORR_HI @%?ORR_LS @%?ORR_GE @%?ORR_LT @%?ORR_GT @%?ORR_LE @%?ORR @%?ORR_ZZ @%?ORR_S_EQ @%?ORR_S_NE @%?ORR_S_CS @%?ORR_S_CC @%?ORR_S_MI @%?ORR_S_PL @%?ORR_S_VS @%?ORR_S_VC @%?ORR_S_HI @%?ORR_S_LS @%?ORR_S_GE @%?ORR_S_LT @%?ORR_S_GT @%?ORR_S_LE @%? ORR_S @%?ORR_S_ZZ @%?PKHBT_EQ @%?PKHBT_NE @%?PKHBT_CS @%?PKHBT_CC @%?PKHBT_MI @%?PKHBT_PL @%?PKHBT_VS @%?PKHBT_VC @%?PKHBT_HI @%?PKHBT_LS @%?PKHBT_GE @%?PKHBT_LT @%?PKHBT_GT @%?PKHBT_LE @%? PKHBT @%?PKHBT_ZZ @%?PKHTB_EQ @%?PKHTB_NE @%?PKHTB_CS @%?PKHTB_CC @%?PKHTB_MI @%?PKHTB_PL @%?PKHTB_VS @%?PKHTB_VC @%?PKHTB_HI @%?PKHTB_LS @%?PKHTB_GE @%?PKHTB_LT @%?PKHTB_GT @%?PKHTB_LE @%? PKHTB @%?PKHTB_ZZ @%? PLD_W @%?PLD @%?PLI @%?POP_EQ @%?POP_NE @%?POP_CS @%?POP_CC @%?POP_MI @%?POP_PL @%?POP_VS @%?POP_VC @%?POP_HI @%?POP_LS @%?POP_GE @%?POP_LT @%?POP_GT @%?POP_LE @%?POP @%?POP_ZZ @%?
PUSH_EQ @%?
PUSH_NE @%?
PUSH_CS @%?
PUSH_CC @%?
PUSH_MI @%?
PUSH_PL @%?
PUSH_VS @%?
PUSH_VC @%?
PUSH_HI @%?
PUSH_LS @%?
PUSH_GE @%?
PUSH_LT @%?
PUSH_GT @%?
PUSH_LE @%?PUSH @%?
PUSH_ZZ @%?
QADD_EQ @%?
QADD_NE @%?
QADD_CS @%?
QADD_CC @%?
QADD_MI @%?
QADD_PL @%?
QADD_VS @%?
QADD_VC @%?
QADD_HI @%?
QADD_LS @%?
QADD_GE @%?
QADD_LT @%?
QADD_GT @%?
QADD_LE @%?QADD @%?
QADD_ZZ @%?QADD16_EQ @%?QADD16_NE @%?QADD16_CS @%?QADD16_CC @%?QADD16_MI @%?QADD16_PL @%?QADD16_VS @%?QADD16_VC @%?QADD16_HI @%?QADD16_LS @%?QADD16_GE @%?QADD16_LT @%?QADD16_GT @%?QADD16_LE @%?QADD16 @%?QADD16_ZZ @%?QADD8_EQ @%?QADD8_NE @%?QADD8_CS @%?QADD8_CC @%?QADD8_MI @%?QADD8_PL @%?QADD8_VS @%?QADD8_VC @%?QADD8_HI @%?QADD8_LS @%?QADD8_GE @%?QADD8_LT @%?QADD8_GT @%?QADD8_LE @%? QADD8 @%?QADD8_ZZ @%?
QASX_EQ @%?
QASX_NE @%?
QASX_CS @%?
QASX_CC @%?
QASX_MI @%?
QASX_PL @%?
QASX_VS @%?
QASX_VC @%?
QASX_HI @%?
QASX_LS @%?
QASX_GE @%?
QASX_LT @%?
QASX_GT @%?
QASX_LE @%?QASX @%?
QASX_ZZ @%?QDADD_EQ @%?QDADD_NE @%?QDADD_CS @%?QDADD_CC @%?QDADD_MI @%?QDADD_PL @%?QDADD_VS @%?QDADD_VC @%?QDADD_HI @%?QDADD_LS @%?QDADD_GE @%?QDADD_LT @%?QDADD_GT @%?QDADD_LE @%? QDADD @%?QDADD_ZZ @%?QDSUB_EQ @%?QDSUB_NE @%?QDSUB_CS @%?QDSUB_CC @%?QDSUB_MI @%?QDSUB_PL @%?QDSUB_VS @%?QDSUB_VC @%?QDSUB_HI @%?QDSUB_LS @%?QDSUB_GE @%?QDSUB_LT @%?QDSUB_GT @%?QDSUB_LE @%? QDSUB @%?QDSUB_ZZ @%?
QSAX_EQ @%?
QSAX_NE @%?
QSAX_CS @%?
QSAX_CC @%?
QSAX_MI @%?
QSAX_PL @%?
QSAX_VS @%?
QSAX_VC @%?
QSAX_HI @%?
QSAX_LS @%?
QSAX_GE @%?
QSAX_LT @%?
QSAX_GT @%?
QSAX_LE @%?QSAX @%?
QSAX_ZZ @%?
QSUB_EQ @%?
QSUB_NE @%?
QSUB_CS @%?
QSUB_CC @%?
QSUB_MI @%?
QSUB_PL @%?
QSUB_VS @%?
QSUB_VC @%?
QSUB_HI @%?
QSUB_LS @%?
QSUB_GE @%?
QSUB_LT @%?
QSUB_GT @%?
QSUB_LE @%?QSUB @%?
QSUB_ZZ @%?QSUB16_EQ @%?QSUB16_NE @%?QSUB16_CS @%?QSUB16_CC @%?QSUB16_MI @%?QSUB16_PL @%?QSUB16_VS @%?QSUB16_VC @%?QSUB16_HI @%?QSUB16_LS @%?QSUB16_GE @%?QSUB16_LT @%?QSUB16_GT @%?QSUB16_LE @%?QSUB16 @%?QSUB16_ZZ @%?QSUB8_EQ @%?QSUB8_NE @%?QSUB8_CS @%?QSUB8_CC @%?QSUB8_MI @%?QSUB8_PL @%?QSUB8_VS @%?QSUB8_VC @%?QSUB8_HI @%?QSUB8_LS @%?QSUB8_GE @%?QSUB8_LT @%?QSUB8_GT @%?QSUB8_LE @%? QSUB8 @%?QSUB8_ZZ @%?
RBIT_EQ @%?
RBIT_NE @%?
RBIT_CS @%?
RBIT_CC @%?
RBIT_MI @%?
RBIT_PL @%?
RBIT_VS @%?
RBIT_VC @%?
RBIT_HI @%?
RBIT_LS @%?
RBIT_GE @%?
RBIT_LT @%?
RBIT_GT @%?
RBIT_LE @%?RBIT @%?
RBIT_ZZ @%?REV_EQ @%?REV_NE @%?REV_CS @%?REV_CC @%?REV_MI @%?REV_PL @%?REV_VS @%?REV_VC @%?REV_HI @%?REV_LS @%?REV_GE @%?REV_LT @%?REV_GT @%?REV_LE @%?REV @%?REV_ZZ @%?REV16_EQ @%?REV16_NE @%?REV16_CS @%?REV16_CC @%?REV16_MI @%?REV16_PL @%?REV16_VS @%?REV16_VC @%?REV16_HI @%?REV16_LS @%?REV16_GE @%?REV16_LT @%?REV16_GT @%?REV16_LE @%? REV16 @%?REV16_ZZ @%?REVSH_EQ @%?REVSH_NE @%?REVSH_CS @%?REVSH_CC @%?REVSH_MI @%?REVSH_PL @%?REVSH_VS @%?REVSH_VC @%?REVSH_HI @%?REVSH_LS @%?REVSH_GE @%?REVSH_LT @%?REVSH_GT @%?REVSH_LE @%? REVSH @%?REVSH_ZZ @%?ROR_EQ @%?ROR_NE @%?ROR_CS @%?ROR_CC @%?ROR_MI @%?ROR_PL @%?ROR_VS @%?ROR_VC @%?ROR_HI @%?ROR_LS @%?ROR_GE @%?ROR_LT @%?ROR_GT @%?ROR_LE @%?ROR @%?ROR_ZZ @%?ROR_S_EQ @%?ROR_S_NE @%?ROR_S_CS @%?ROR_S_CC @%?ROR_S_MI @%?ROR_S_PL @%?ROR_S_VS @%?ROR_S_VC @%?ROR_S_HI @%?ROR_S_LS @%?ROR_S_GE @%?ROR_S_LT @%?ROR_S_GT @%?ROR_S_LE @%? ROR_S @%?ROR_S_ZZ @%?RRX_EQ @%?RRX_NE @%?RRX_CS @%?RRX_CC @%?RRX_MI @%?RRX_PL @%?RRX_VS @%?RRX_VC @%?RRX_HI @%?RRX_LS @%?RRX_GE @%?RRX_LT @%?RRX_GT @%?RRX_LE @%?RRX @%?RRX_ZZ @%?RRX_S_EQ @%?RRX_S_NE @%?RRX_S_CS @%?RRX_S_CC @%?RRX_S_MI @%?RRX_S_PL @%?RRX_S_VS @%?RRX_S_VC @%?RRX_S_HI @%?RRX_S_LS @%?RRX_S_GE @%?RRX_S_LT @%?RRX_S_GT @%?RRX_S_LE @%? RRX_S @%?RRX_S_ZZ @%?RSB_EQ @%?RSB_NE @%?RSB_CS @%?RSB_CC @%?RSB_MI @%?RSB_PL @%?RSB_VS @%?RSB_VC @%?RSB_HI @%?RSB_LS @%?RSB_GE @%?RSB_LT @%?RSB_GT @%?RSB_LE @%?RSB @%?RSB_ZZ @%?RSB_S_EQ @%?RSB_S_NE @%?RSB_S_CS @%?RSB_S_CC @%?RSB_S_MI @%?RSB_S_PL @%?RSB_S_VS @%?RSB_S_VC @%?RSB_S_HI @%?RSB_S_LS @%?RSB_S_GE @%?RSB_S_LT @%?RSB_S_GT @%?RSB_S_LE @%? RSB_S @%?RSB_S_ZZ @%?RSC_EQ @%?RSC_NE @%?RSC_CS @%?RSC_CC @%?RSC_MI @%?RSC_PL @%?RSC_VS @%?RSC_VC @%?RSC_HI @%?RSC_LS @%?RSC_GE @%?RSC_LT @%?RSC_GT @%?RSC_LE @%?RSC @%?RSC_ZZ @%?RSC_S_EQ @%?RSC_S_NE @%?RSC_S_CS @%?RSC_S_CC @%?RSC_S_MI @%?RSC_S_PL @%?RSC_S_VS @%?RSC_S_VC @%?RSC_S_HI @%?RSC_S_LS @%?RSC_S_GE @%?RSC_S_LT @%?RSC_S_GT @%?RSC_S_LE @%? RSC_S @%?RSC_S_ZZ @%?SADD16_EQ @%?SADD16_NE @%?SADD16_CS @%?SADD16_CC @%?SADD16_MI @%?SADD16_PL @%?SADD16_VS @%?SADD16_VC @%?SADD16_HI @%?SADD16_LS @%?SADD16_GE @%?SADD16_LT @%?SADD16_GT @%?SADD16_LE @%?SADD16 @%?SADD16_ZZ @%?SADD8_EQ @%?SADD8_NE @%?SADD8_CS @%?SADD8_CC @%?SADD8_MI @%?SADD8_PL @%?SADD8_VS @%?SADD8_VC @%?SADD8_HI @%?SADD8_LS @%?SADD8_GE @%?SADD8_LT @%?SADD8_GT @%?SADD8_LE @%? SADD8 @%?SADD8_ZZ @%?
SASX_EQ @%?
SASX_NE @%?
SASX_CS @%?
SASX_CC @%?
SASX_MI @%?
SASX_PL @%?
SASX_VS @%?
SASX_VC @%?
SASX_HI @%?
SASX_LS @%?
SASX_GE @%?
SASX_LT @%?
SASX_GT @%?
SASX_LE @%?SASX @%?
SASX_ZZ @%?SBC_EQ @%?SBC_NE @%?SBC_CS @%?SBC_CC @%?SBC_MI @%?SBC_PL @%?SBC_VS @%?SBC_VC @%?SBC_HI @%?SBC_LS @%?SBC_GE @%?SBC_LT @%?SBC_GT @%?SBC_LE @%?SBC @%?SBC_ZZ @%?SBC_S_EQ @%?SBC_S_NE @%?SBC_S_CS @%?SBC_S_CC @%?SBC_S_MI @%?SBC_S_PL @%?SBC_S_VS @%?SBC_S_VC @%?SBC_S_HI @%?SBC_S_LS @%?SBC_S_GE @%?SBC_S_LT @%?SBC_S_GT @%?SBC_S_LE @%? SBC_S @%?SBC_S_ZZ @%?
SBFX_EQ @%?
SBFX_NE @%?
SBFX_CS @%?
SBFX_CC @%?
SBFX_MI @%?
SBFX_PL @%?
SBFX_VS @%?
SBFX_VC @%?
SBFX_HI @%?
SBFX_LS @%?
SBFX_GE @%?
SBFX_LT @%?
SBFX_GT @%?
SBFX_LE @%?SBFX @%?
SBFX_ZZ @%?SEL_EQ @%?SEL_NE @%?SEL_CS @%?SEL_CC @%?SEL_MI @%?SEL_PL @%?SEL_VS @%?SEL_VC @%?SEL_HI @%?SEL_LS @%?SEL_GE @%?SEL_LT @%?SEL_GT @%?SEL_LE @%?SEL @%?SEL_ZZ @%?SETEND @%? SEV_EQ @%?SEV_NE @%?SEV_CS @%?SEV_CC @%?SEV_MI @%?SEV_PL @%?SEV_VS @%?SEV_VC @%?SEV_HI @%?SEV_LS @%?SEV_GE @%?SEV_LT @%?SEV_GT @%?SEV_LE @%?SEV @%?SEV_ZZ @%?SHADD16_EQ @%?SHADD16_NE @%?SHADD16_CS @%?SHADD16_CC @%?SHADD16_MI @%?SHADD16_PL @%?SHADD16_VS @%?SHADD16_VC @%?SHADD16_HI @%?SHADD16_LS @%?SHADD16_GE @%?SHADD16_LT @%?SHADD16_GT @%?SHADD16_LE @%?
SHADD16 @%?SHADD16_ZZ @%?SHADD8_EQ @%?SHADD8_NE @%?SHADD8_CS @%?SHADD8_CC @%?SHADD8_MI @%?SHADD8_PL @%?SHADD8_VS @%?SHADD8_VC @%?SHADD8_HI @%?SHADD8_LS @%?SHADD8_GE @%?SHADD8_LT @%?SHADD8_GT @%?SHADD8_LE @%?SHADD8 @%?SHADD8_ZZ @%?SHASX_EQ @%?SHASX_NE @%?SHASX_CS @%?SHASX_CC @%?SHASX_MI @%?SHASX_PL @%?SHASX_VS @%?SHASX_VC @%?SHASX_HI @%?SHASX_LS @%?SHASX_GE @%?SHASX_LT @%?SHASX_GT @%?SHASX_LE @%? SHASX @%?SHASX_ZZ @%?SHSAX_EQ @%?SHSAX_NE @%?SHSAX_CS @%?SHSAX_CC @%?SHSAX_MI @%?SHSAX_PL @%?SHSAX_VS @%?SHSAX_VC @%?SHSAX_HI @%?SHSAX_LS @%?SHSAX_GE @%?SHSAX_LT @%?SHSAX_GT @%?SHSAX_LE @%? SHSAX @%?SHSAX_ZZ @%?SHSUB16_EQ @%?SHSUB16_NE @%?SHSUB16_CS @%?SHSUB16_CC @%?SHSUB16_MI @%?SHSUB16_PL @%?SHSUB16_VS @%?SHSUB16_VC @%?SHSUB16_HI @%?SHSUB16_LS @%?SHSUB16_GE @%?SHSUB16_LT @%?SHSUB16_GT @%?SHSUB16_LE @%?
SHSUB16 @%?SHSUB16_ZZ @%?SHSUB8_EQ @%?SHSUB8_NE @%?SHSUB8_CS @%?SHSUB8_CC @%?SHSUB8_MI @%?SHSUB8_PL @%?SHSUB8_VS @%?SHSUB8_VC @%?SHSUB8_HI @%?SHSUB8_LS @%?SHSUB8_GE @%?SHSUB8_LT @%?SHSUB8_GT @%?SHSUB8_LE @%?SHSUB8 @%?SHSUB8_ZZ @%?SMLABB_EQ @%?SMLABB_NE @%?SMLABB_CS @%?SMLABB_CC @%?SMLABB_MI @%?SMLABB_PL @%?SMLABB_VS @%?SMLABB_VC @%?SMLABB_HI @%?SMLABB_LS @%?SMLABB_GE @%?SMLABB_LT @%?SMLABB_GT @%?SMLABB_LE @%?SMLABB @%?SMLABB_ZZ @%?SMLABT_EQ @%?SMLABT_NE @%?SMLABT_CS @%?SMLABT_CC @%?SMLABT_MI @%?SMLABT_PL @%?SMLABT_VS @%?SMLABT_VC @%?SMLABT_HI @%?SMLABT_LS @%?SMLABT_GE @%?SMLABT_LT @%?SMLABT_GT @%?SMLABT_LE @%?SMLABT @%?SMLABT_ZZ @%?SMLATB_EQ @%?SMLATB_NE @%?SMLATB_CS @%?SMLATB_CC @%?SMLATB_MI @%?SMLATB_PL @%?SMLATB_VS @%?SMLATB_VC @%?SMLATB_HI @%?SMLATB_LS @%?SMLATB_GE @%?SMLATB_LT @%?SMLATB_GT @%?SMLATB_LE @%?SMLATB |