| /external/clang/test/CodeGen/ |
| builtins-systemz-error2.c | 4 typedef __attribute__((vector_size(16))) char v16i8; typedef
6 v16i8 f0(v16i8 a, v16i8 b) {
8 v16i8 tmp = __builtin_s390_vaq(a, b); // expected-error {{'__builtin_s390_vaq' needs target feature vector}}
|
| /external/libyuv/files/source/ |
| row_msa.cc | 78 v16i8 zero_m = {0}; \
80 vec0_m = (v8i16)__msa_ilvr_b((v16i8)in_y, (v16i8)in_y); \
81 vec1_m = (v8i16)__msa_ilvr_b((v16i8)zero_m, (v16i8)in_uv); \
128 vec0_m = (v8i16)__msa_ilvev_b((v16i8)in1, (v16i8)in0); \
129 vec1_m = (v8i16)__msa_ilvev_b((v16i8)in3, (v16i8)in2); \
154 y_out = (v16u8)__msa_pckev_b((v16i8)reg1_m, (v16i8)reg0_m);
[all...] |
| scale_msa.cc | 33 src0 = (v16u8)__msa_ld_b((v16i8*)src_argb, 0);
34 src1 = (v16u8)__msa_ld_b((v16i8*)src_argb, 16);
51 src0 = (v16u8)__msa_ld_b((v16i8*)src_argb, 0);
52 src1 = (v16u8)__msa_ld_b((v16i8*)src_argb, 16);
71 v16i8 shuffler = {0, 4, 1, 5, 2, 6, 3, 7, 8, 12, 9, 13, 10, 14, 11, 15};
74 src0 = (v16u8)__msa_ld_b((v16i8*)s, 0);
75 src1 = (v16u8)__msa_ld_b((v16i8*)s, 16);
76 src2 = (v16u8)__msa_ld_b((v16i8*)t, 0);
77 src3 = (v16u8)__msa_ld_b((v16i8*)t, 16);
78 vec0 = (v16u8)__msa_vshf_b(shuffler, (v16i8)src0, (v16i8)src0)
[all...] |
| rotate_msa.cc | 24 out0 = (v16u8)__msa_ilvr_b((v16i8)in1, (v16i8)in0); \
25 out1 = (v16u8)__msa_ilvl_b((v16i8)in1, (v16i8)in0); \
26 out2 = (v16u8)__msa_ilvr_b((v16i8)in3, (v16i8)in2); \
27 out3 = (v16u8)__msa_ilvl_b((v16i8)in3, (v16i8)in2); \
90 src0 = (v16u8)__msa_ld_b((v16i8*)s, 0);
92 src1 = (v16u8)__msa_ld_b((v16i8*)s, 0)
[all...] |
| /prebuilts/gcc/darwin-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9.x/include/ |
| msa.h | 31 typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); typedef
53 extern v16i8 __builtin_msa_sll_b(v16i8, v16i8);
57 extern v16i8 __builtin_msa_slli_b(v16i8, unsigned char);
61 extern v16i8 __builtin_msa_sra_b(v16i8, v16i8);
65 extern v16i8 __builtin_msa_srai_b(v16i8, unsigned char)
[all...] |
| /prebuilts/gcc/linux-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9.x/include/ |
| msa.h | 31 typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); typedef
53 extern v16i8 __builtin_msa_sll_b(v16i8, v16i8);
57 extern v16i8 __builtin_msa_slli_b(v16i8, unsigned char);
61 extern v16i8 __builtin_msa_sra_b(v16i8, v16i8);
65 extern v16i8 __builtin_msa_srai_b(v16i8, unsigned char)
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| vaddsplat.ll | 10 %v16i8 = type <16 x i8>
56 define void @test_v16i8_pos_even(%v16i8* %P, %v16i8* %S) {
57 %p = load %v16i8, %v16i8* %P
58 %r = add %v16i8 %p, < i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16 >
59 store %v16i8 %r, %v16i8* %S
67 define void @test_v16i8_neg_even(%v16i8* %P, %v16i8* %S)
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| loopfilter_16_msa.c | 82 v16i8 zero = { 0 };
112 q0_r_in = (v8u16)__msa_ilvr_b(zero, (v16i8)q0);
131 q0_l_in = (v8u16)__msa_ilvl_b(zero, (v16i8)q0);
146 r_out = (v8i16)__msa_pckev_b((v16i8)l_out, (v16i8)r_out);
152 q1_r_in = (v8u16)__msa_ilvr_b(zero, (v16i8)q1);
159 q1_l_in = (v8u16)__msa_ilvl_b(zero, (v16i8)q1);
166 r_out = (v8i16)__msa_pckev_b((v16i8)l_out, (v16i8)r_out);
172 q2_r_in = (v8u16)__msa_ilvr_b(zero, (v16i8)q2)
[all...] |
| vpx_convolve_msa.h | 24 tmp_dpadd_0 = __msa_dotp_s_h((v16i8)vec0, (v16i8)filt0); \
25 tmp_dpadd_0 = __msa_dpadd_s_h(tmp_dpadd_0, (v16i8)vec1, (v16i8)filt1); \
26 tmp_dpadd_1 = __msa_dotp_s_h((v16i8)vec2, (v16i8)filt2); \
27 tmp_dpadd_1 = __msa_dpadd_s_h(tmp_dpadd_1, (v16i8)vec3, (v16i8)filt3); \
36 v16i8 vec0_m, vec1_m, vec2_m, vec3_m; \
54 v16i8 vec0_m, vec1_m, vec2_m, vec3_m, vec4_m, vec5_m, vec6_m, vec7_m;
[all...] |
| vpx_convolve8_msa.c | 29 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10;
30 v16i8 filt_hz0, filt_hz1, filt_hz2, filt_hz3;
65 out2 = (v8i16)__msa_ilvev_b((v16i8)hz_out5, (v16i8)hz_out4);
74 hz_out6 = (v8i16)__msa_sldi_b((v16i8)hz_out7, (v16i8)hz_out5, 8);
75 out3 = (v8i16)__msa_ilvev_b((v16i8)hz_out7, (v16i8)hz_out6);
81 hz_out8 = (v8i16)__msa_sldi_b((v16i8)hz_out9, (v16i8)hz_out7, 8)
[all...] |
| vpx_convolve8_avg_msa.c | 19 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10;
21 v16i8 filt_hz0, filt_hz1, filt_hz2, filt_hz3;
55 vec2 = (v8i16)__msa_ilvev_b((v16i8)hz_out5, (v16i8)hz_out4);
65 hz_out6 = (v8i16)__msa_sldi_b((v16i8)hz_out7, (v16i8)hz_out5, 8);
66 vec3 = (v8i16)__msa_ilvev_b((v16i8)hz_out7, (v16i8)hz_out6);
72 hz_out8 = (v8i16)__msa_sldi_b((v16i8)hz_out9, (v16i8)hz_out7, 8)
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| mfqe_msa.c | 21 v16i8 src0 = { 0 };
22 v16i8 src1 = { 0 };
23 v16i8 dst0 = { 0 };
24 v16i8 dst1 = { 0 };
50 dst0 = (v16i8)__msa_pckev_b((v16i8)res_h_l, (v16i8)res_h_r);
61 dst1 = (v16i8)__msa_pckev_b((v16i8)res_h_l, (v16i8)res_h_r)
[all...] |
| sixtap_filter_msa.c | 38 v16i8 vec0_m, vec1_m, vec2_m; \
55 v16i8 vec0_m, vec1_m, vec2_m, vec3_m, vec4_m, vec5_m; \
69 v16i8 vec0_m, vec1_m, vec2_m, vec3_m, vec4_m, vec5_m, vec6_m, vec7_m; \
89 tmp0 = __msa_dotp_s_h((v16i8)vec0, (v16i8)filt0); \
90 tmp0 = __msa_dpadd_s_h(tmp0, (v16i8)vec1, (v16i8)filt1); \
97 v16i8 vec0_m, vec1_m; \
112 v16i8 vec0_m, vec1_m, vec2_m, vec3_m; \
123 v16i8 vec0_m, vec1_m, vec2_m, vec3_m;
[all...] |
| bilinear_filter_msa.c | 33 v16i8 src0, src1, src2, src3, mask;
54 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask;
55 v16i8 res0, res1, res2, res3;
90 v16i8 src0, src1, src2, src3, mask;
112 v16i8 src0, src1, src2, src3, mask, out0, out1;
184 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask;
247 v16i8 src0, src1, src2, src3, src4;
248 v16i8 src10_r, src32_r, src21_r, src43_r, src2110, src4332;
264 src2110 = __msa_pckev_b((v16i8)tmp1, (v16i8)tmp0)
[all...] |
| vp8_macros_msa.h | 21 #define LD_SB(...) LD_B(v16i8, __VA_ARGS__)
33 #define ST_SB(...) ST_B(v16i8, __VA_ARGS__)
274 #define LD_SB2(...) LD_B2(v16i8, __VA_ARGS__)
282 #define LD_SB3(...) LD_B3(v16i8, __VA_ARGS__)
290 #define LD_SB4(...) LD_B4(v16i8, __VA_ARGS__)
298 #define LD_SB5(...) LD_B5(v16i8, __VA_ARGS__)
307 #define LD_SB8(...) LD_B8(v16i8, __VA_ARGS__)
358 #define ST_SB4(...) ST_B4(v16i8, __VA_ARGS__)
514 v16i8 zero_m = { 0 }; \
516 out0 = (RTYPE)__msa_sldi_b((v16i8)zero_m, (v16i8)in0, slide_val);
[all...] |
| loopfilter_filters_msa.c | 21 p1_a_sub_q1 = (v16u8)__msa_srli_b((v16i8)p1_a_sub_q1, 1); \
29 v16i8 p1_m, p0_m, q0_m, q1_m, filt, q0_sub_p0, t1, t2; \
30 const v16i8 cnst4b = __msa_ldi_b(4); \
31 const v16i8 cnst3b = __msa_ldi_b(3); \
33 p1_m = (v16i8)__msa_xori_b(p1, 0x80); \
34 p0_m = (v16i8)__msa_xori_b(p0, 0x80); \
35 q0_m = (v16i8)__msa_xori_b(q0, 0x80); \
36 q1_m = (v16i8)__msa_xori_b(q1, 0x80); \
64 v16i8 p1_m, p0_m, q0_m, q1_m, filt, filt1, filt2; \
65 v16i8 q0_sub_p0;
[all...] |
| /external/libvpx/libvpx/vp8/encoder/mips/msa/ |
| denoising_msa.c | 116 temp2_h = (v8i16)__msa_pckev_b((v16i8)temp3_h, (v16i8)temp2_h);
117 running_avg_y = (v16u8)__msa_pckev_b((v16i8)temp1_h, (v16i8)temp0_h);
164 temp2_h = (v8i16)__msa_pckev_b((v16i8)temp3_h, (v16i8)temp2_h);
165 running_avg_y = (v16u8)__msa_pckev_b((v16i8)temp1_h, (v16i8)temp0_h);
238 running_avg_y = (v16u8)__msa_pckev_b((v16i8)adjust3, (v16i8)adjust2)
[all...] |
| /external/libvpx/libvpx/vp9/common/mips/msa/ |
| vp9_mfqe_msa.c | 21 v16i8 src0 = { 0 };
22 v16i8 src1 = { 0 };
23 v16i8 dst0 = { 0 };
24 v16i8 dst1 = { 0 };
50 dst0 = (v16i8)__msa_pckev_b((v16i8)res_h_l, (v16i8)res_h_r);
61 dst1 = (v16i8)__msa_pckev_b((v16i8)res_h_l, (v16i8)res_h_r)
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| v8_IT_1.ll | 9 %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* %bar, i32 1)
16 declare <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* , i32 )
|
| /external/llvm/test/CodeGen/X86/ |
| vshift-6.ll | 8 ; This happens for example when lowering a shift left of a MVT::v16i8 vector.
12 ; B = BITCAST MVT::v16i8, A
16 ; D = BITCAST MVT::v16i8, C
22 ; Where 'r' is a vector of type MVT::v16i8, and
|
| /external/llvm/test/CodeGen/ARM/ |
| 2013-10-11-select-stalls.ll | 13 %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* %foo, i32 1)
14 %vld2 = call <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* %bar, i32 1)
21 declare <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* , i32 )
|
| /external/libpng/mips/ |
| filter_msa_intrinsics.c | 42 #define MSA_SRLI_B(a, b) __msa_srli_b((v16i8) a, b)
300 out0 = (RTYPE) __msa_ilvr_b((v16i8) in0, (v16i8) in1); \
301 out1 = (RTYPE) __msa_ilvr_b((v16i8) in2, (v16i8) in3); \
314 v16i8 zero_m = { 0 }; \
315 out0 = (RTYPE) __msa_sldi_b((v16i8) zero_m, (v16i8) in0, slide_val); \
316 out1 = (RTYPE) __msa_sldi_b((v16i8) zero_m, (v16i8) in1, slide_val);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrAltivec.td | 33 // Since we canonicalize buildvectors to v16i8, all vnots "-1" operands will be
36 (xor node:$in, (bitconvert (v16i8 immAllOnesV)))>;
79 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
83 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
87 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
91 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
95 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
99 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
105 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{
133 (vector_shuffle (v16i8 node:$lhs), node:$rhs), [
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| vec-const-01.ll | 1 ; Test vector byte masks, v16i8 version.
57 ; Test an all-zeros v2i8 that gets promoted to v16i8.
65 ; Test a mixed v2i8 that gets promoted to v16i8 (mask 0x8000).
73 ; Test an all-zeros v4i8 that gets promoted to v16i8.
81 ; Test a mixed v4i8 that gets promoted to v16i8 (mask 0x9000).
89 ; Test an all-zeros v8i8 that gets promoted to v16i8.
97 ; Test a mixed v8i8 that gets promoted to v16i8 (mask 0xE500).
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/useful-harnesses/ |
| vecoperations.c | 3 typedef unsigned char v16i8 __attribute__((ext_vector_type(16))); typedef
10 void print_v16i8(const char *str, const v16i8 v) {
13 v16i8 vec;
24 void print_v16i8_hex(const char *str, const v16i8 v) {
27 v16i8 vec;
68 v16i8 v16i8_mpy(v16i8 v1, v16i8 v2) {
72 v16i8 v16i8_add(v16i8 v1, v16i8 v2)
[all...] |
