1 ; RUN: llc -march=amdgcn -mcpu=bonaire -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=ALL %s 2 ; RUN: llc -march=amdgcn -mcpu=carrizo --show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s 3 ; RUN: llc -march=amdgcn -mcpu=bonaire -mtriple=amdgcn-unknown-amdhsa < %s -mattr=-flat-for-global | FileCheck -check-prefix=GCNHSA -check-prefix=CIHSA -check-prefix=ALL %s 4 ; RUN: llc -march=amdgcn -mcpu=carrizo -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCNHSA -check-prefix=VIHSA -check-prefix=ALL %s 5 6 ; FIXME: align on alloca seems to be ignored for private_segment_alignment 7 8 ; ALL-LABEL: {{^}}large_alloca_compute_shader: 9 10 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0 11 ; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0 12 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1 13 ; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1 14 ; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1 15 ; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000 16 ; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000 17 18 19 ; GCNHSA: .amd_kernel_code_t 20 21 ; GCNHSA: compute_pgm_rsrc2_scratch_en = 1 22 ; GCNHSA: compute_pgm_rsrc2_user_sgpr = 8 23 ; GCNHSA: compute_pgm_rsrc2_tgid_x_en = 1 24 ; GCNHSA: compute_pgm_rsrc2_tgid_y_en = 0 25 ; GCNHSA: compute_pgm_rsrc2_tgid_z_en = 0 26 ; GCNHSA: compute_pgm_rsrc2_tg_size_en = 0 27 ; GCNHSA: compute_pgm_rsrc2_tidig_comp_cnt = 0 28 29 ; GCNHSA: enable_sgpr_private_segment_buffer = 1 30 ; GCNHSA: enable_sgpr_dispatch_ptr = 0 31 ; GCNHSA: enable_sgpr_queue_ptr = 0 32 ; GCNHSA: enable_sgpr_kernarg_segment_ptr = 1 33 ; GCNHSA: enable_sgpr_dispatch_id = 0 34 ; GCNHSA: enable_sgpr_flat_scratch_init = 1 35 ; GCNHSA: enable_sgpr_private_segment_size = 0 36 ; GCNHSA: enable_sgpr_grid_workgroup_count_x = 0 37 ; GCNHSA: enable_sgpr_grid_workgroup_count_y = 0 38 ; GCNHSA: enable_sgpr_grid_workgroup_count_z = 0 39 ; GCNHSA: workitem_private_segment_byte_size = 32772 40 ; GCNHSA: private_segment_alignment = 4 41 ; GCNHSA: .end_amd_kernel_code_t 42 43 44 ; GCNHSA: buffer_store_dword {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], s9 offen 45 ; GCNHSA: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], s9 offen 46 47 ; Scratch size = alloca size + emergency stack slot 48 ; ALL: ; ScratchSize: 32772 49 define void @large_alloca_compute_shader(i32 %x, i32 %y) #0 { 50 %large = alloca [8192 x i32], align 4 51 %gep = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 8191 52 store volatile i32 %x, i32* %gep 53 %gep1 = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 %y 54 %val = load volatile i32, i32* %gep1 55 store volatile i32 %val, i32 addrspace(1)* undef 56 ret void 57 } 58 59 attributes #0 = { nounwind } 60
