1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3 ; Extract the high bit of the 1st quarter 4 ; GCN-LABEL: {{^}}v_uextract_bit_31_i128: 5 ; GCN: buffer_load_dword [[VAL:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 6 7 ; GCN: v_mov_b32_e32 v[[ZERO0:[0-9]+]], 0{{$}} 8 ; GCN: v_mov_b32_e32 v[[ZERO1:[0-9]+]], 0{{$}} 9 ; GCN: v_mov_b32_e32 v[[ZERO2:[0-9]+]], v[[ZERO0]]{{$}} 10 ; GCN: v_lshrrev_b32_e32 v[[SHIFT:[0-9]+]], 31, [[VAL]] 11 12 ; GCN: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 13 ; GCN: s_endpgm 14 define void @v_uextract_bit_31_i128(i128 addrspace(1)* %out, i128 addrspace(1)* %in) #1 { 15 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x() 16 %in.gep = getelementptr i128, i128 addrspace(1)* %in, i32 %id.x 17 %out.gep = getelementptr i128, i128 addrspace(1)* %out, i32 %id.x 18 %ld.64 = load i128, i128 addrspace(1)* %in.gep 19 %srl = lshr i128 %ld.64, 31 20 %bit = and i128 %srl, 1 21 store i128 %bit, i128 addrspace(1)* %out.gep 22 ret void 23 } 24 25 ; Extract the high bit of the 2nd quarter 26 ; GCN-LABEL: {{^}}v_uextract_bit_63_i128: 27 ; GCN: buffer_load_dword [[VAL:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4{{$}} 28 29 ; GCN-DAG: v_mov_b32_e32 v[[ZERO0:[0-9]+]], 0{{$}} 30 ; GCN: v_mov_b32_e32 v[[ZERO1:[0-9]+]], v[[ZERO0]]{{$}} 31 ; GCN: v_mov_b32_e32 v[[ZERO2:[0-9]+]], v[[ZERO0]]{{$}} 32 ; GCN-DAG: v_lshrrev_b32_e32 v[[SHIFT:[0-9]+]], 31, [[VAL]] 33 34 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 35 ; GCN: s_endpgm 36 define void @v_uextract_bit_63_i128(i128 addrspace(1)* %out, i128 addrspace(1)* %in) #1 { 37 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x() 38 %in.gep = getelementptr i128, i128 addrspace(1)* %in, i32 %id.x 39 %out.gep = getelementptr i128, i128 addrspace(1)* %out, i32 %id.x 40 %ld.64 = load i128, i128 addrspace(1)* %in.gep 41 %srl = lshr i128 %ld.64, 63 42 %bit = and i128 %srl, 1 43 store i128 %bit, i128 addrspace(1)* %out.gep 44 ret void 45 } 46 47 ; Extract the high bit of the 3rd quarter 48 ; GCN-LABEL: {{^}}v_uextract_bit_95_i128: 49 ; GCN: buffer_load_dword [[VAL:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8{{$}} 50 51 ; GCN-DAG: v_mov_b32_e32 v[[ZERO0:[0-9]+]], 0{{$}} 52 ; GCN: v_mov_b32_e32 v[[ZERO1:[0-9]+]], 0{{$}} 53 ; GCN: v_mov_b32_e32 v[[ZERO2:[0-9]+]], v[[ZERO0]]{{$}} 54 ; GCN-DAG: v_lshrrev_b32_e32 v[[SHIFT:[0-9]+]], 31, [[VAL]] 55 56 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 57 ; GCN: s_endpgm 58 define void @v_uextract_bit_95_i128(i128 addrspace(1)* %out, i128 addrspace(1)* %in) #1 { 59 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x() 60 %in.gep = getelementptr i128, i128 addrspace(1)* %in, i32 %id.x 61 %out.gep = getelementptr i128, i128 addrspace(1)* %out, i32 %id.x 62 %ld.64 = load i128, i128 addrspace(1)* %in.gep 63 %srl = lshr i128 %ld.64, 95 64 %bit = and i128 %srl, 1 65 store i128 %bit, i128 addrspace(1)* %out.gep 66 ret void 67 } 68 69 ; Extract the high bit of the 4th quarter 70 ; GCN-LABEL: {{^}}v_uextract_bit_127_i128: 71 ; GCN: buffer_load_dword [[VAL:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:12{{$}} 72 73 ; GCN: v_mov_b32_e32 v[[ZERO0:[0-9]+]], 0{{$}} 74 ; GCN: v_mov_b32_e32 v[[ZERO1:[0-9]+]], v[[ZERO0]]{{$}} 75 ; GCN: v_mov_b32_e32 v[[ZERO2:[0-9]+]], v[[ZERO0]]{{$}} 76 ; GCN-DAG: v_lshrrev_b32_e32 v[[SHIFT:[0-9]+]], 31, [[VAL]] 77 78 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[SHIFT]]:[[ZERO2]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 79 ; GCN: s_endpgm 80 define void @v_uextract_bit_127_i128(i128 addrspace(1)* %out, i128 addrspace(1)* %in) #1 { 81 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x() 82 %in.gep = getelementptr i128, i128 addrspace(1)* %in, i32 %id.x 83 %out.gep = getelementptr i128, i128 addrspace(1)* %out, i32 %id.x 84 %ld.64 = load i128, i128 addrspace(1)* %in.gep 85 %srl = lshr i128 %ld.64, 127 86 %bit = and i128 %srl, 1 87 store i128 %bit, i128 addrspace(1)* %out.gep 88 ret void 89 } 90 91 ; Spans more than 2 dword boundaries 92 ; GCN-LABEL: {{^}}v_uextract_bit_34_100_i128: 93 ; GCN: buffer_load_dwordx4 v{{\[}}[[VAL0:[0-9]+]]:[[VAL3:[0-9]+]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 94 95 ; GCN-DAG: v_lshl_b64 v{{\[}}[[SHLLO:[0-9]+]]:[[SHLHI:[0-9]+]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, 30 96 ; GCN-DAG: v_lshrrev_b32_e32 v[[ELT1PART:[0-9]+]], 2, v{{[[0-9]+}} 97 ; GCN-DAG: v_bfe_u32 v[[ELT2PART:[0-9]+]], v[[VAL3]], 2, 2{{$}} 98 ; GCN-DAG: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0{{$}} 99 ; GCN-DAG: v_or_b32_e32 v[[OR0:[0-9]+]], v[[SHLLO]], v[[ELT1PART]] 100 ; GCN-DAG: v_or_b32_e32 v[[OR1:[0-9]+]], 0, v[[SHLHI]]{{$}} 101 102 ; GCN-DAG: buffer_store_dwordx4 v{{\[}}[[OR0]]:[[ZERO]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 103 ; GCN: s_endpgm 104 define void @v_uextract_bit_34_100_i128(i128 addrspace(1)* %out, i128 addrspace(1)* %in) #1 { 105 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x() 106 %in.gep = getelementptr i128, i128 addrspace(1)* %in, i32 %id.x 107 %out.gep = getelementptr i128, i128 addrspace(1)* %out, i32 %id.x 108 %ld.64 = load i128, i128 addrspace(1)* %in.gep 109 %srl = lshr i128 %ld.64, 34 110 %bit = and i128 %srl, 73786976294838206463 111 store i128 %bit, i128 addrspace(1)* %out.gep 112 ret void 113 } 114 115 declare i32 @llvm.amdgcn.workitem.id.x() #0 116 117 attributes #0 = { nounwind readnone } 118 attributes #1 = { nounwind } 119
