Lines Matching refs:src
374 void movq(CpuRegister dst, const Immediate& src);
375 void movl(CpuRegister dst, const Immediate& src);
376 void movq(CpuRegister dst, CpuRegister src);
377 void movl(CpuRegister dst, CpuRegister src);
379 void movntl(const Address& dst, CpuRegister src);
380 void movntq(const Address& dst, CpuRegister src);
382 void movq(CpuRegister dst, const Address& src);
383 void movl(CpuRegister dst, const Address& src);
384 void movq(const Address& dst, CpuRegister src);
386 void movl(const Address& dst, CpuRegister src);
389 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
390 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
391 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
393 void movzxb(CpuRegister dst, CpuRegister src);
394 void movzxb(CpuRegister dst, const Address& src);
395 void movsxb(CpuRegister dst, CpuRegister src);
396 void movsxb(CpuRegister dst, const Address& src);
397 void movb(CpuRegister dst, const Address& src);
398 void movb(const Address& dst, CpuRegister src);
401 void movzxw(CpuRegister dst, CpuRegister src);
402 void movzxw(CpuRegister dst, const Address& src);
403 void movsxw(CpuRegister dst, CpuRegister src);
404 void movsxw(CpuRegister dst, const Address& src);
405 void movw(CpuRegister dst, const Address& src);
406 void movw(const Address& dst, CpuRegister src);
409 void leaq(CpuRegister dst, const Address& src);
410 void leal(CpuRegister dst, const Address& src);
412 void movaps(XmmRegister dst, XmmRegister src); // move
413 void movaps(XmmRegister dst, const Address& src); // load aligned
414 void movups(XmmRegister dst, const Address& src); // load unaligned
415 void movaps(const Address& dst, XmmRegister src); // store aligned
416 void movups(const Address& dst, XmmRegister src); // store unaligned
418 void movss(XmmRegister dst, const Address& src);
419 void movss(const Address& dst, XmmRegister src);
420 void movss(XmmRegister dst, XmmRegister src);
422 void movsxd(CpuRegister dst, CpuRegister src);
423 void movsxd(CpuRegister dst, const Address& src);
425 void movd(XmmRegister dst, CpuRegister src); // Note: this is the r64 version, formally movq.
426 void movd(CpuRegister dst, XmmRegister src); // Note: this is the r64 version, formally movq.
427 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
428 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
430 void addss(XmmRegister dst, XmmRegister src);
431 void addss(XmmRegister dst, const Address& src);
432 void subss(XmmRegister dst, XmmRegister src);
433 void subss(XmmRegister dst, const Address& src);
434 void mulss(XmmRegister dst, XmmRegister src);
435 void mulss(XmmRegister dst, const Address& src);
436 void divss(XmmRegister dst, XmmRegister src);
437 void divss(XmmRegister dst, const Address& src);
439 void addps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
440 void subps(XmmRegister dst, XmmRegister src);
441 void mulps(XmmRegister dst, XmmRegister src);
442 void divps(XmmRegister dst, XmmRegister src);
444 void movapd(XmmRegister dst, XmmRegister src); // move
445 void movapd(XmmRegister dst, const Address& src); // load aligned
446 void movupd(XmmRegister dst, const Address& src); // load unaligned
447 void movapd(const Address& dst, XmmRegister src); // store aligned
448 void movupd(const Address& dst, XmmRegister src); // store unaligned
450 void movsd(XmmRegister dst, const Address& src);
451 void movsd(const Address& dst, XmmRegister src);
452 void movsd(XmmRegister dst, XmmRegister src);
454 void addsd(XmmRegister dst, XmmRegister src);
455 void addsd(XmmRegister dst, const Address& src);
456 void subsd(XmmRegister dst, XmmRegister src);
457 void subsd(XmmRegister dst, const Address& src);
458 void mulsd(XmmRegister dst, XmmRegister src);
459 void mulsd(XmmRegister dst, const Address& src);
460 void divsd(XmmRegister dst, XmmRegister src);
461 void divsd(XmmRegister dst, const Address& src);
463 void addpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
464 void subpd(XmmRegister dst, XmmRegister src);
465 void mulpd(XmmRegister dst, XmmRegister src);
466 void divpd(XmmRegister dst, XmmRegister src);
468 void movdqa(XmmRegister dst, XmmRegister src); // move
469 void movdqa(XmmRegister dst, const Address& src); // load aligned
470 void movdqu(XmmRegister dst, const Address& src); // load unaligned
471 void movdqa(const Address& dst, XmmRegister src); // store aligned
472 void movdqu(const Address& dst, XmmRegister src); // store unaligned
474 void paddb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
475 void psubb(XmmRegister dst, XmmRegister src);
477 void paddw(XmmRegister dst, XmmRegister src);
478 void psubw(XmmRegister dst, XmmRegister src);
479 void pmullw(XmmRegister dst, XmmRegister src);
481 void paddd(XmmRegister dst, XmmRegister src);
482 void psubd(XmmRegister dst, XmmRegister src);
483 void pmulld(XmmRegister dst, XmmRegister src);
485 void paddq(XmmRegister dst, XmmRegister src);
486 void psubq(XmmRegister dst, XmmRegister src);
488 void cvtsi2ss(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
489 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
490 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
491 void cvtsi2sd(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
492 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
493 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
495 void cvtss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
496 void cvtss2sd(XmmRegister dst, XmmRegister src);
497 void cvtss2sd(XmmRegister dst, const Address& src);
499 void cvtsd2si(CpuRegister dst, XmmRegister src
500 void cvtsd2ss(XmmRegister dst, XmmRegister src);
501 void cvtsd2ss(XmmRegister dst, const Address& src);
503 void cvttss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
504 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
505 void cvttsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
506 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
508 void cvtdq2ps(XmmRegister dst, XmmRegister src);
509 void cvtdq2pd(XmmRegister dst, XmmRegister src);
520 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
521 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
523 void sqrtsd(XmmRegister dst, XmmRegister src);
524 void sqrtss(XmmRegister dst, XmmRegister src);
526 void xorpd(XmmRegister dst, const Address& src);
527 void xorpd(XmmRegister dst, XmmRegister src);
528 void xorps(XmmRegister dst, const Address& src);
529 void xorps(XmmRegister dst, XmmRegister src);
530 void pxor(XmmRegister dst, XmmRegister src); // no addr variant (for now)
532 void andpd(XmmRegister dst, const Address& src);
533 void andpd(XmmRegister dst, XmmRegister src);
534 void andps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
535 void pand(XmmRegister dst, XmmRegister src);
537 void andnpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
538 void andnps(XmmRegister dst, XmmRegister src);
539 void pandn(XmmRegister dst, XmmRegister src);
541 void orpd(XmmRegister dst, XmmRegister src); // no addr variant (for now)
542 void orps(XmmRegister dst, XmmRegister src);
543 void por(XmmRegister dst, XmmRegister src);
545 void pavgb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
546 void pavgw(XmmRegister dst, XmmRegister src);
547 void psadbw(XmmRegister dst, XmmRegister src);
548 void pmaddwd(XmmRegister dst, XmmRegister src);
549 void phaddw(XmmRegister dst, XmmRegister src);
550 void phaddd(XmmRegister dst, XmmRegister src);
551 void haddps(XmmRegister dst, XmmRegister src);
552 void haddpd(XmmRegister dst, XmmRegister src);
553 void phsubw(XmmRegister dst, XmmRegister src);
554 void phsubd(XmmRegister dst, XmmRegister src);
555 void hsubps(XmmRegister dst, XmmRegister src);
556 void hsubpd(XmmRegister dst, XmmRegister src);
558 void pminsb(XmmRegister dst, XmmRegister src); // no addr variant (for now)
559 void pmaxsb(XmmRegister dst, XmmRegister src);
560 void pminsw(XmmRegister dst, XmmRegister src);
561 void pmaxsw(XmmRegister dst, XmmRegister src);
562 void pminsd(XmmRegister dst, XmmRegister src);
563 void pmaxsd(XmmRegister dst, XmmRegister src);
565 void pminub(XmmRegister dst, XmmRegister src); // no addr variant (for now)
566 void pmaxub(XmmRegister dst, XmmRegister src);
567 void pminuw(XmmRegister dst, XmmRegister src);
568 void pmaxuw(XmmRegister dst, XmmRegister src);
569 void pminud(XmmRegister dst, XmmRegister src);
570 void pmaxud(XmmRegister dst, XmmRegister src);
572 void minps(XmmRegister dst, XmmRegister src); // no addr variant (for now)
573 void maxps(XmmRegister dst, XmmRegister src);
574 void minpd(XmmRegister dst, XmmRegister src);
575 void maxpd(XmmRegister dst, XmmRegister src);
577 void pcmpeqb(XmmRegister dst, XmmRegister src);
578 void pcmpeqw(XmmRegister dst, XmmRegister src);
579 void pcmpeqd(XmmRegister dst, XmmRegister src);
580 void pcmpeqq(XmmRegister dst, XmmRegister src);
582 void pcmpgtb(XmmRegister dst, XmmRegister src);
583 void pcmpgtw(XmmRegister dst, XmmRegister src);
584 void pcmpgtd(XmmRegister dst, XmmRegister src);
585 void pcmpgtq(XmmRegister dst, XmmRegister src); // SSE4.2
587 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
588 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
589 void pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm);
591 void punpcklbw(XmmRegister dst, XmmRegister src);
592 void punpcklwd(XmmRegister dst, XmmRegister src);
593 void punpckldq(XmmRegister dst, XmmRegister src);
594 void punpcklqdq(XmmRegister dst, XmmRegister src);
596 void punpckhbw(XmmRegister dst, XmmRegister src);
597 void punpckhwd(XmmRegister dst, XmmRegister src);
598 void punpckhdq(XmmRegister dst, XmmRegister src);
599 void punpckhqdq(XmmRegister dst, XmmRegister src);
614 void flds(const Address& src);
618 void fldl(const Address& src);
627 void fldcw(const Address& src);
631 void fildl(const Address& src);
632 void filds(const Address& src);
642 void xchgl(CpuRegister dst, CpuRegister src);
643 void xchgq(CpuRegister dst, CpuRegister src);
671 void andl(CpuRegister dst, CpuRegister src);
674 void andq(CpuRegister dst, CpuRegister src);
678 void orl(CpuRegister dst, CpuRegister src);
680 void orq(CpuRegister dst, CpuRegister src);
684 void xorl(CpuRegister dst, CpuRegister src);
688 void xorq(CpuRegister dst, CpuRegister src);
691 void addl(CpuRegister dst, CpuRegister src);
699 void addq(CpuRegister dst, CpuRegister src);
702 void subl(CpuRegister dst, CpuRegister src);
707 void subq(CpuRegister dst, CpuRegister src);
716 void imull(CpuRegister dst, CpuRegister src);
718 void imull(CpuRegister dst, CpuRegister src, const Immediate& imm);
721 void imulq(CpuRegister src);
722 void imulq(CpuRegister dst, CpuRegister src);
785 void bsfl(CpuRegister dst, CpuRegister src);
786 void bsfl(CpuRegister dst, const Address& src);
787 void bsfq(CpuRegister dst, CpuRegister src);
788 void bsfq(CpuRegister dst, const Address& src);
790 void bsrl(CpuRegister dst, CpuRegister src);
791 void bsrl(CpuRegister dst, const Address& src);
792 void bsrq(CpuRegister dst, CpuRegister src);
793 void bsrq(CpuRegister dst, const Address& src);
795 void popcntl(CpuRegister dst, CpuRegister src);
796 void popcntl(CpuRegister dst, const Address& src);
797 void popcntq(CpuRegister dst, CpuRegister src);
798 void popcntq(CpuRegister dst, const Address& src);
923 void EmitOptionalRex32(CpuRegister dst, CpuRegister src);
924 void EmitOptionalRex32(XmmRegister dst, XmmRegister src);
925 void EmitOptionalRex32(CpuRegister dst, XmmRegister src);
926 void EmitOptionalRex32(XmmRegister dst, CpuRegister src);
935 void EmitRex64(CpuRegister dst, CpuRegister src);
938 src);
939 void EmitRex64(CpuRegister dst, XmmRegister src);
942 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src);
