Lines Matching refs:rd
160 #define SEB(rd, rt) \
161 seb rd, rt
162 #define SEH(rd, rt) \
163 seh rd, rt
167 #define SEB(rd, rt) \
168 sll rd, rt, 24; \
169 sra rd, rd, 24
170 #define SEH(rd, rt) \
171 sll rd, rt, 16; \
172 sra rd, rd, 16
190 #define LSA(rd, rs, rt, sa) \
192 lsa rd, rs, rt, sa; \
194 addu rd, rs, rt; \
199 #define LSA(rd, rs, rt, sa) \
204 addu rd, AT, rt; \
207 addu rd, rs, rt; \
278 * Fetch the next instruction from an offset specified by rd. Updates
279 * rPC to point to the next instruction. "rd" must specify the distance
282 #define FETCH_ADVANCE_INST_RB(rd) \
283 addu rPC, rPC, rd; \
292 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC)
293 #define FETCH_S(rd, _count) lh rd, ((_count) * 2)(rPC)
300 #define FETCH_B(rd, _count, _byte) lbu rd, ((_count) * 2 + _byte)(rPC)
305 #define GET_INST_OPCODE(rd) and rd, rINST, 0xFF
310 #define GET_OPCODE_TARGET(rd) \
311 sll rd, rd, ${handler_size_bits}; \
312 addu rd, rIBASE, rd
315 * Begin executing the opcode in rd.
317 #define GOTO_OPCODE(rd) \
318 GET_OPCODE_TARGET(rd); \
319 JR(rd)
324 #define GET_VREG(rd, rix) LOAD_eas2(rd, rFP, rix)
326 #define GET_VREG_F(rd, rix) \
329 l.s rd, (AT); \
333 #define SET_VREG(rd, rix) \
335 sw rd, 0(t8); \
339 #define SET_VREG(rd, rix) \
343 sw rd, 0(t8); \
350 #define SET_VREG_OBJECT(rd, rix) \
352 sw rd, 0(t8); \
354 sw rd, 0(t8)
356 #define SET_VREG_OBJECT(rd, rix) \
360 sw rd, 0(t8); \
363 sw rd, 0(t8)
388 #define SET_VREG_F(rd, rix) \
390 s.s rd, 0(t8); \
394 #define SET_VREG_F(rd, rix) \
398 s.s rd, 0(t8); \
442 #define SET_VREG_GOTO(rd, rix, dst) \
446 sw rd, 0(t8); \
452 #define SET_VREG_GOTO(rd, rix, dst) \
458 sw rd, 0(t8); \
468 #define SET_VREG_OBJECT_GOTO(rd, rix, dst) \
472 sw rd, 0(t8); \
475 sw rd, 0(t8); \
478 #define SET_VREG_OBJECT_GOTO(rd, rix, dst) \
484 sw rd, 0(t8); \
488 sw rd, 0(t8); \
524 #define SET_VREG_F_GOTO(rd, rix, dst) \
528 s.s rd, 0(t8); \
534 #define SET_VREG_F_GOTO(rd, rix, dst) \
540 s.s rd, 0(t8); \
597 #define GET_OPA(rd) srl rd, rINST, 8
599 #define GET_OPA4(rd) ext rd, rINST, 8, 4
601 #define GET_OPA4(rd) GET_OPA(rd); and rd, 0xf
603 #define GET_OPB(rd) srl rd, rINST, 12
606 * Form an Effective Address rd = rbase + roff<<shift;
609 #define EASN(rd, rbase, roff, shift) LSA(rd, roff, rbase, shift)
611 #define EAS1(rd, rbase, roff) EASN(rd, rbase, roff, 1)
612 #define EAS2(rd, rbase, roff) EASN(rd, rbase, roff, 2)
613 #define EAS3(rd, rbase, roff) EASN(rd, rbase, roff, 3)
614 #define EAS4(rd, rbase, roff) EASN(rd, rbase, roff, 4)
616 #define LOAD_eas2(rd, rbase, roff) \
619 lw rd, 0(AT); \
622 #define STORE_eas2(rd, rbase, roff) \
625 sw rd, 0(AT); \
628 #define LOAD_RB_OFF(rd, rbase, off) lw rd, off(rbase)
629 #define STORE_RB_OFF(rd, rbase, off) sw rd, off(rbase)
667 #define LOAD_base_offMirrorArray_length(rd, rbase) LOAD_RB_OFF(rd, rbase, MIRROR_ARRAY_LENGTH_OFFSET)
669 #define STACK_STORE(rd, off) sw rd, off(sp)
670 #define STACK_LOAD(rd, off) lw rd, off(sp)
