Lines Matching refs:Port
275 extern int pcie_mode_get(UINT32 Port, PCIE_PORT_INFO *port_info);
277 extern int pcie_port_ctrl(UINT32 Port, UINT32 port_ctrl);
279 extern int pcie_link_speed_set(UINT32 Port, PCIE_PORT_GEN speed);
281 extern int pcie_port_cfg_set(UINT32 Port, pcie_cfg_params_s *cfg_params);
283 extern int pcie_port_cfg_get(UINT32 Port, pcie_cfg_params_s *cfg_params);
286 extern int pcie_dma_chan_ctl(UINT32 Port,UINT32 channel,UINT32 control);
288 extern int pcie_dma_chan_attribu_set(UINT32 Port,UINT32 channel, pcie_dma_channel_attrs_s *dma_attribute);
290 extern int pcie_dma_cur_status_get(UINT32 Port, UINT32 channel, pcie_dma_channel_status_e *dma_channel_status);
292 extern int pcie_dma_int_enable(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
294 extern int pcie_dma_int_mask(UINT32 Port, UINT32 channel, pcie_dma_int_type_e int_type);
296 extern int pcie_dma_tranfer_stop(UINT32 Port, UINT32 channel);
299 extern int pcie_dma_int_status_get(UINT32 Port, UINT32 channel, int *dma_int_status);
301 extern int pcie_dma_int_clear(UINT32 Port, UINT32 channel, pcie_dma_int_type_e dma_int_type);
304 extern int pcie_dma_read(UINT32 Port,void *source, void *dest,UINT32 transfer_size, UINT32 burst_size);
306 extern int pcie_dma_write(UINT32 Port,void *source, void *dest,UINT32 transfer_size, UINT32 burst_size);
308 extern int pcie_multicast_cfg_set(UINT32 Port,pcie_multicast_cfg_s *multicast_cfg,UINT32 win_num);
310 extern int pcie_setup_ntb(UINT32 Port, PCIE_NTB_CFG *ntb_cfg);
312 extern int pcie_ntb_doorbell_send(UINT32 Port,UINT32 doorbell);
314 extern int pcie_loop_test_start(UINT32 Port, UINT32 loop_type);
316 extern int pcie_loop_test_stop(UINT32 Port, UINT32 loop_type);
318 extern int pcie_loop_test_get(UINT32 Port, UINT32 loop_type, pcie_loop_test_result_s *test_result);
319 extern int pcie_port_reset(UINT32 Port);
321 extern int pcie_port_error_report_enable(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func, PCIE_ERROR_TYPE pcie_error);
323 extern int pcie_port_error_report_disable(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func, PCIE_ERROR_TYPE pcie_error);
325 extern int pcie_device_error_status_get(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func,UINT32 clear, \
327 extern int pcie_port_aer_cap_get(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func,UINT32 *aer_cap);
329 extern int pcie_port_aer_status_get(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func,pcie_uc_aer_status_u *pcie_aer_status);
330 extern int pcie_port_aer_status_clr(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func);
332 extern int pcie_port_aer_report_enable(UINT32 Port, PCIE_ERROR_TYPE pcie_aer_type);
335 extern int pcie_port_aer_report_disable(UINT32 Port, PCIE_ERROR_TYPE pcie_aer_type);
338 extern int pcie_cfg_read(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func, UINT32 reg_offset, UINT32 * value, UINT32 length);
340 extern int pcie_cfg_write(UINT32 Port, UINT32 bus, UINT32 dev, UINT32 func, UINT32 reg_offset, UINT8 * data, UINT32 length);
342 extern int pcie_mem_read(UINT32 Port,void * local_addr, void *pcie_mem_addr,UINT32 length);
344 extern int pcie_mem_write(UINT32 Port,void *local_addr , void *pcie_mem_addr,UINT32 length);
